linux-kernel - [PATCH 18/19] clk: eyeq: add an optional clk_div

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Message-Id: <20250903-clk-eyeq7-v1-18-3f5024b5d6e2@bootlin.com>
Date: Wed, 03 Sep 2025 14:47:25 +0200
From: Benoît Monin <benoit.monin@...tlin.com>
To: Vladimir Kondratiev <vladimir.kondratiev@...ileye.com>, 
 Gregory CLEMENT <gregory.clement@...tlin.com>, 
 Théo Lebrun <theo.lebrun@...tlin.com>, 
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, 
 Thomas Bogendoerfer <tsbogend@...ha.franken.de>, 
 Michael Turquette <mturquette@...libre.com>, 
 Stephen Boyd <sboyd@...nel.org>, Philipp Zabel <p.zabel@...gutronix.de>
Cc: Thomas Petazzoni <thomas.petazzoni@...tlin.com>, 
 linux-mips@...r.kernel.org, devicetree@...r.kernel.org, 
 linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org, 
 Tawfik Bayouk <tawfik.bayouk@...ileye.com>, 
 Sari Khoury <sari.khoury@...ileye.com>, 
 Benoît Monin <benoit.monin@...tlin.com>
Subject: [PATCH 18/19] clk: eyeq: add an optional clk_div_table to divider

The new type of divider in eyeQ7H OLB are table-based, use it if
present. Make sure we don't pass CLK_DIVIDER_EVEN_INTEGERS in the flags
when registerting a table based divider as it has priority over the
table.

Signed-off-by: Benoît Monin <benoit.monin@...tlin.com>
---
 drivers/clk/clk-eyeq.c | 21 ++++++++++++---------
 1 file changed, 12 insertions(+), 9 deletions(-)

diff --git a/drivers/clk/clk-eyeq.c b/drivers/clk/clk-eyeq.c
index a6260c38393776afab60e994c99008cfeecf6bc3..8d5e194215e9d3d13b334a5ebf004499050e84b9 100644
--- a/drivers/clk/clk-eyeq.c
+++ b/drivers/clk/clk-eyeq.c
@@ -119,17 +119,20 @@ struct eqc_pll {
 };
 
 /*
- * Divider clock. Divider is 2*(v+1), with v the register value.
+ * Divider clock.
+ * If the table is NULL, divider is 2*(v+1), with v the register value.
  * Min divider is 2, max is 2*(2^width).
+ * Otherwise the divider values are looked up in the table.
  */
 struct eqc_div {
-	unsigned int	index;
-	const char	*name;
-	unsigned int	parent_idx;
-	const char	*parent_name;
-	unsigned int	reg;
-	u8		shift;
-	u8		width;
+	unsigned int			index;
+	const char			*name;
+	unsigned int			parent_idx;
+	const char			*parent_name;
+	unsigned int			reg;
+	u8				shift;
+	u8				width;
+	const struct clk_div_table	*table;
 };
 
 struct eqc_fixed_factor {
@@ -433,7 +436,7 @@ static void eqc_probe_init_divs(struct device *dev, const struct eqc_match_data
 
 		hw = clk_hw_register_divider_table_parent_data(dev, div->name,
 				&parent_data, 0, reg, div->shift, div->width,
-				CLK_DIVIDER_EVEN_INTEGERS, NULL, NULL);
+				div->table ? 0 : CLK_DIVIDER_EVEN_INTEGERS, div->table, NULL);
 		cells->hws[div->index] = hw;
 		if (IS_ERR(hw))
 			dev_warn(dev, "failed registering %s: %pe\n",

-- 
2.51.0