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Message-ID: <20250903153916.GCaLhhJHHK7oY-PTqz@fat_crate.local>
Date: Wed, 3 Sep 2025 17:39:16 +0200
From: Borislav Petkov <bp@...en8.de>
To: Yazen Ghannam <yazen.ghannam@....com>
Cc: x86@...nel.org, Tony Luck <tony.luck@...el.com>,
	"Rafael J. Wysocki" <rafael@...nel.org>,
	linux-kernel@...r.kernel.org, linux-edac@...r.kernel.org,
	Smita.KoralahalliChannabasappa@....com,
	Qiuxu Zhuo <qiuxu.zhuo@...el.com>,
	Nikolay Borisov <nik.borisov@...e.com>, linux-acpi@...r.kernel.org
Subject: Re: [PATCH v5 15/20] x86/mce/amd: Enable interrupt vectors once
 per-CPU on SMCA systems

On Wed, Sep 03, 2025 at 10:00:22AM -0400, Yazen Ghannam wrote:
> But any reason to use u32? Why not u8? Alignment or something?

Struct padding:

$ pahole --header elf64_hdr vmlinux

...

struct mce_amd_cpu_data {
        mce_banks_t                thr_intr_banks;       /*     0     8 */
        mce_banks_t                dfr_intr_banks;       /*     8     8 */
        u8                         thr_intr_en:1;        /*    16: 0  1 */
        u8                         dfr_intr_en:1;        /*    16: 1  1 */
        u8                         __resv:6;             /*    16: 2  1 */
 
        /* size: 24, cachelines: 1, members: 5 */
        /* padding: 7 */
	^^^^^^^^^^^

        /* last cacheline: 24 bytes */
};

vs

struct mce_amd_cpu_data {
        mce_banks_t                thr_intr_banks;       /*     0     8 */
        mce_banks_t                dfr_intr_banks;       /*     8     8 */
        u32                        thr_intr_en:1;        /*    16: 0  4 */
        u32                        dfr_intr_en:1;        /*    16: 1  4 */
        u32                        __resv:30;            /*    16: 2  4 */
 
        /* size: 24, cachelines: 1, members: 5 */
        /* padding: 4 */
	^^^^^^^^^^

        /* last cacheline: 24 bytes */
};

The end result is the same unless your do __packed.

But you might as well use the u32 in the distant case you need more flags
- you never know with our RAS folks.

:-P

-- 
Regards/Gruss,
    Boris.

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