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Message-ID: <20250903191459.GA1214624@bhelgaas>
Date: Wed, 3 Sep 2025 14:14:59 -0500
From: Bjorn Helgaas <helgaas@...nel.org>
To: Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>
Cc: cros-qcom-dts-watchers@...omium.org,
	Bjorn Andersson <andersson@...nel.org>,
	Konrad Dybcio <konradybcio@...nel.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Lorenzo Pieralisi <lpieralisi@...nel.org>,
	Manivannan Sadhasivam <mani@...nel.org>,
	Krzysztof WilczyƄski <kwilczynski@...nel.org>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	Jingoo Han <jingoohan1@...il.com>, linux-arm-msm@...r.kernel.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-pci@...r.kernel.org, quic_vbadigan@...cinc.com,
	quic_mrana@...cinc.com, quic_vpernami@...cinc.com,
	mmareddy@...cinc.com,
	Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Subject: Re: [PATCH v8 3/5] PCI: dwc: qcom: Switch to dwc ELBI resource
 mapping

On Thu, Aug 28, 2025 at 01:04:24PM +0530, Krishna Chaitanya Chundru wrote:
> Instead of using qcom ELBI resources mapping let the DWC core map it
> ELBI is DWC specific.

This seems like basically the same change you (Mani) added to the
"[PATCH v8 2/5] PCI: dwc: Add support for ELBI resource mapping"
patch?  (The patch with Mani's additions is at
https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git/commit/?h=controller/dwc-ecam&id=d39e0103e38f9889271a77a837b6179b42d6730d)

If this qcom change is separated out, why can't the exynos and qcom-ep
changes from patch 2/5 be separated out?  If we ever had to bisect
and/or revert parts of this, it seems like it would be simpler to do
them consistently like this:

  - PCI: dwc: Add ELBI resource mapping
  - PCI: exynos: Switch to dwc ELBI resource mapping
  - PCI: qcom: Switch to dwc ELBI resource mapping
  - PCI: qcom-ep: Switch to dwc ELBI resource mapping

> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>
> ---
>  drivers/pci/controller/dwc/pcie-qcom.c | 16 +++++++---------
>  1 file changed, 7 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> index 294babe1816e4d0c2b2343fe22d89af72afcd6cd..5092752de23866ef95036bb3f8fae9bb06e8ea1e 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -276,7 +276,6 @@ struct qcom_pcie_port {
>  struct qcom_pcie {
>  	struct dw_pcie *pci;
>  	void __iomem *parf;			/* DT parf */
> -	void __iomem *elbi;			/* DT elbi */
>  	void __iomem *mhi;
>  	union qcom_pcie_resources res;
>  	struct phy *phy;
> @@ -414,12 +413,17 @@ static void qcom_pcie_configure_dbi_atu_base(struct qcom_pcie *pcie)
>  
>  static void qcom_pcie_2_1_0_ltssm_enable(struct qcom_pcie *pcie)
>  {
> +	struct dw_pcie *pci = pcie->pci;
>  	u32 val;
>  
> +	if (!pci->elbi_base) {
> +		dev_err(pci->dev, "ELBI is not present\n");
> +		return;
> +	}
>  	/* enable link training */
> -	val = readl(pcie->elbi + ELBI_SYS_CTRL);
> +	val = readl(pci->elbi_base + ELBI_SYS_CTRL);
>  	val |= ELBI_SYS_CTRL_LT_ENABLE;
> -	writel(val, pcie->elbi + ELBI_SYS_CTRL);
> +	writel(val, pci->elbi_base + ELBI_SYS_CTRL);
>  }
>  
>  static int qcom_pcie_get_resources_2_1_0(struct qcom_pcie *pcie)
> @@ -1861,12 +1865,6 @@ static int qcom_pcie_probe(struct platform_device *pdev)
>  		goto err_pm_runtime_put;
>  	}
>  
> -	pcie->elbi = devm_platform_ioremap_resource_byname(pdev, "elbi");
> -	if (IS_ERR(pcie->elbi)) {
> -		ret = PTR_ERR(pcie->elbi);
> -		goto err_pm_runtime_put;
> -	}
> -
>  	/* MHI region is optional */
>  	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mhi");
>  	if (res) {
> 
> -- 
> 2.34.1
> 

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