linux-kernel - Re: [PATCH v1 1/2] dt-bindings: iio: adc: Add the NXP SAR ADC for s32g2/3 platforms

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Message-ID: <175693634467.2902578.11035954677902748188.robh@kernel.org>
Date: Wed, 3 Sep 2025 16:52:25 -0500
From: "Rob Herring (Arm)" <robh@...nel.org>
To: Daniel Lezcano <daniel.lezcano@...aro.org>
Cc: krzk+dt@...nel.org, mbrugger@...e.com, conor+dt@...nel.org, s32@....com,
	chester62515@...il.com, dlechner@...libre.com,
	devicetree@...r.kernel.org, jic23@...nel.org,
	linux-kernel@...r.kernel.org, ghennadi.procopciuc@....nxp.com,
	linux-iio@...r.kernel.org, nuno.sa@...log.com, andy@...nel.org
Subject: Re: [PATCH v1 1/2] dt-bindings: iio: adc: Add the NXP SAR ADC for
 s32g2/3 platforms


On Wed, 03 Sep 2025 12:27:55 +0200, Daniel Lezcano wrote:
> The s32g2 and s32g3 NXP platforms have two instances of a Successive
> Approximation Register ADC. It supports the raw, trigger and scan
> modes which involves the DMA. Add their descriptions.
> 
> Signed-off-by: Daniel Lezcano <daniel.lezcano@...aro.org>
> ---
>  .../bindings/iio/adc/nxp,s32g2-sar-adc.yaml   | 68 +++++++++++++++++++
>  1 file changed, 68 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/iio/adc/nxp,s32g2-sar-adc.yaml
> 

Reviewed-by: Rob Herring (Arm) <robh@...nel.org>