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Message-ID: <9e7c8819159b3d2782ea63f9431ed208c31bf328.camel@codeconstruct.com.au>
Date: Wed, 03 Sep 2025 17:04:50 +0930
From: Andrew Jeffery <andrew@...econstruct.com.au>
To: Tomer Maimon <tmaimon77@...il.com>, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
avifishman70@...il.com, tali.perry1@...il.com, joel@....id.au,
venture@...gle.com, yuenn@...gle.com, benjaminfair@...gle.com
Cc: openbmc@...ts.ozlabs.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH RESEND v2 0/2] NPCM845 reset and clock device tree
updates
Hi Tomer,
On Mon, 2025-09-01 at 16:24 +0300, Tomer Maimon wrote:
> This series updates the NPCM845 device tree for the integrated reset and
> clock controller using the auxiliary device framework.
> Patch 1 combines the reset and clock nodes into nuvoton,npcm845-reset.
> Patch 2 adds a 25 MHz refclk and updates peripherals to use it.
>
> Tested on NPCM845 evaluation board.
>
> Changes since version 1:
> - Tested in version 6.17.rc1.
>
> Tomer Maimon (2):
> arm64: dts: nuvoton: combine NPCM845 reset and clk nodes
> arm64: dts: nuvoton: add refclk and update peripheral clocks for
> NPCM845
>
> .../dts/nuvoton/nuvoton-common-npcm8xx.dtsi | 20 ++++++++-----------
> .../boot/dts/nuvoton/nuvoton-npcm845-evb.dts | 6 ++++++
> 2 files changed, 14 insertions(+), 12 deletions(-)
>
The changes are already applied and on their way into mainline:
https://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git/commit/?h=soc/dt&id=1b8086f1729b8f22e60ba93676602174a3b0a4fc
Thanks,
Andrew
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