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Message-ID: <CAMuHMdVT+VknkQzFDTpXdiDh0JMwgUPXK7muKv99H2k7pzzodw@mail.gmail.com>
Date: Wed, 3 Sep 2025 11:12:34 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: "Lad, Prabhakar" <prabhakar.csengg@...il.com>
Cc: Krzysztof Kozlowski <krzk@...nel.org>, Clément Léger <clement.leger@...tlin.com>, 
	Andrew Lunn <andrew+netdev@...n.ch>, "David S. Miller" <davem@...emloft.net>, 
	Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, 
	Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Heiner Kallweit <hkallweit1@...il.com>, Russell King <linux@...linux.org.uk>, 
	Philipp Zabel <p.zabel@...gutronix.de>, Geert Uytterhoeven <geert+renesas@...der.be>, 
	Magnus Damm <magnus.damm@...il.com>, Wolfram Sang <wsa+renesas@...g-engineering.com>, 
	linux-renesas-soc@...r.kernel.org, netdev@...r.kernel.org, 
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
	Biju Das <biju.das.jz@...renesas.com>, 
	Fabrizio Castro <fabrizio.castro.jz@...esas.com>, 
	Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH net-next 01/10] dt-bindings: net: pcs: renesas,rzn1-miic:
 Document RZ/T2H and RZ/N2H SoCs

Hi Prabhakar,

Thanks for your patch!

On Tue, 2 Sept 2025 at 14:17, Lad, Prabhakar <prabhakar.csengg@...il.com> wrote:
> On Tue, Sep 2, 2025 at 9:45 AM Krzysztof Kozlowski <krzk@...nel.org> wrote:
> > On Mon, Sep 01, 2025 at 11:43:14PM +0100, Prabhakar wrote:
> > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> > >
> > > Extend the RZN1 MIIC device-tree binding schema to cover the RZ/T2H
> > > and RZ/N2H SoCs. These SoCs have a MIIC converter similar to RZ/N1, but
> > > with some differences:
> > >
> > > - RZ/T2H has two reset lines; RZ/N1 has none.
> > > - RZ/N1 supports 5 MIIC ports, whereas RZ/T2H supports 4 ports.
> > > - On RZ/N1, MIIC ports can be mapped to various endpoints such as RTOS
> > >   MAC ports, switch ports, EtherCAT ports, SERCOS ports, HSR ports, or
> > >   fixed PHY ports (covering PHY input indices 0-13). On RZ/T2H, ports
> > >   can connect to EtherCAT slave ports, Ethernet switch ports, or GMAC
> > >   ports (mapped to PHY input indices 0-8).
> > > - There are register bit differences between the SoCs, and RZ/N1 has
> > >   additional registers currently unused by the driver.
> > > - On RZ/T2H, the switch is connected to GMAC0 whereas on RZ/N1 the
> > >   switch can be connected to GMAC2/HW-RTOS GMAC.
> > >
> > > To accommodate these differences, a new generic compatible string
> > > `renesas,rzt2h-miic` is introduced for both RZ/T2H and RZ/N2H variants.

Until now, we didn't have any family-specific "renesas,rzt2h-*"
compatible values.  Instead, we always used " renesas,r9a09g077-<foo>"
as a fallback for "renesas,r9a09g087-<foo>".
Is there any good reason to start deviating from this?

> > >
> > > The DT schema is updated to validate these differences and ensure proper
> > > port and reset configurations per SoC.
> > >
> > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>

> > > --- a/Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml
> > > +++ b/Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml
> > > @@ -4,13 +4,14 @@
> > >  $id: http://devicetree.org/schemas/net/pcs/renesas,rzn1-miic.yaml#
> > >  $schema: http://devicetree.org/meta-schemas/core.yaml#
> > >
> > > -title: Renesas RZ/N1 MII converter
> > > +title: Renesas RZ/{N1, N2H, T2H} MII converter
> >
> > Don't use regex here. RZ/N1, RZ/N2H and TZ/T2H....
> >
> Ok, I will use it as above (s/TZ/T2H/RZ/T2H).

s@...T2H@...T2H@ ;-)

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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