[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <77252ee2-4640-45f4-a7cb-76e2d47ed0c4@csgroup.eu>
Date: Wed, 3 Sep 2025 11:28:03 +0200
From: Christophe Leroy <christophe.leroy@...roup.eu>
To: Michael Ellerman <mpe@...erman.id.au>, Nicholas Piggin
<npiggin@...il.com>, Madhavan Srinivasan <maddy@...ux.ibm.com>
Cc: linux-kernel@...r.kernel.org, linuxppc-dev@...ts.ozlabs.org
Subject: Re: [PATCH] powerpc/32: Restore clearing of MSR[RI] in
interrupt_exit_kernel_prepare()
Le 01/09/2025 à 12:37, Christophe Leroy a écrit :
> Commit 13799748b957 ("powerpc/64: use interrupt restart table to speed
> up return from interrupt") removed the inconditional clearing of MSR[RI]
> when returning from interrupt into kernel. But powerpc/32 doesn't
> implement interrupt restart table hence still need MSR[RI] to be
> cleared.
This is needed but not enough. A synchronisation instruction is needed
after clearing MSR[RI], otherwise the Instruction Breakpoint still
triggers on a few instructions passed clearing of RI, allthough the
LCTRL2[BRKNOMSK] is unset, meaning "Masked mode, breakpoints are
recognized only when MSR[RI] =1 (reset value)"
We could as a isync() after __hard_EE_RI_disable(), but to minimise the
impact it will be better to move clearing of MSR[RI] in the low-level
assembly part of interrupt exit, just before the mtspr to SRR0 and SRR1,
as was done before commit 6f76a01173cc ("powerpc/syscall: implement
system call entry/exit logic in C for PPC32")
>
> Fixes: 13799748b957 ("powerpc/64: use interrupt restart table to speed up return from interrupt")
> Signed-off-by: Christophe Leroy <christophe.leroy@...roup.eu>
> ---
> arch/powerpc/kernel/interrupt.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/powerpc/kernel/interrupt.c b/arch/powerpc/kernel/interrupt.c
> index e0c681d0b076..e63bfde13e03 100644
> --- a/arch/powerpc/kernel/interrupt.c
> +++ b/arch/powerpc/kernel/interrupt.c
> @@ -443,6 +443,9 @@ notrace unsigned long interrupt_exit_kernel_prepare(struct pt_regs *regs)
>
> if (unlikely(stack_store))
> __hard_EE_RI_disable();
> +#else
> + } else {
> + __hard_EE_RI_disable();
> #endif /* CONFIG_PPC64 */
> }
>
Powered by blists - more mailing lists