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Message-ID: <CAMuHMdWc+gJo35btt3D7mibq+JCnZh4OagFPtSgUELjAG1J9UA@mail.gmail.com>
Date: Wed, 3 Sep 2025 13:58:26 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Tommaso Merciai <tommaso.merciai.xr@...renesas.com>
Cc: tomm.merciai@...il.com, linux-renesas-soc@...r.kernel.org,
biju.das.jz@...renesas.com, Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Philipp Zabel <p.zabel@...gutronix.de>, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 4/5] clk: renesas: rzv2h: Simplify polling condition in __rzv2h_cpg_assert()
Hi Tommaso,
On Wed, 3 Sept 2025 at 10:28, Tommaso Merciai
<tommaso.merciai.xr@...renesas.com> wrote:
> Replace the ternary operator with a direct boolean comparison to improve
> code readability and maintainability. The logic remains unchanged.
>
> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@...renesas.com>
Thanks for your patch!
> --- a/drivers/clk/renesas/rzv2h-cpg.c
> +++ b/drivers/clk/renesas/rzv2h-cpg.c
> @@ -867,7 +867,7 @@ static int __rzv2h_cpg_assert(struct reset_controller_dev *rcdev,
> mask = BIT(monbit);
>
> ret = readl_poll_timeout_atomic(priv->base + reg, value,
> - assert ? (value & mask) : !(value & mask),
> + assert == !!(value & mask),
> 10, 200);
These two lines now fit on a single line.
> if (ret && !assert) {
> value = mask << 16;
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
i.e. will queue in renesas-clk for v6.18 with the above fixed.
No need to resend.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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