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Message-ID: <CADnq5_Mxryr36q_Sj1xPQEmBsnMmxoAo_hksrqewH0=Ae7_pvw@mail.gmail.com>
Date: Thu, 4 Sep 2025 11:15:46 -0400
From: Alex Deucher <alexdeucher@...il.com>
To: Qianfeng Rong <rongqianfeng@...o.com>
Cc: Kenneth Feng <kenneth.feng@....com>, Alex Deucher <alexander.deucher@....com>,
Christian König <christian.koenig@....com>,
David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
"Dr. David Alan Gilbert" <linux@...blig.org>, Lijo Lazar <lijo.lazar@....com>,
Boyuan Zhang <boyuan.zhang@....com>, Mario Limonciello <mario.limonciello@....com>,
amd-gfx@...ts.freedesktop.org, dri-devel@...ts.freedesktop.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] drm/amd/pm: use int type to store negative error codes
Applied. Thanks!
Alex
On Thu, Sep 4, 2025 at 10:58 AM Qianfeng Rong <rongqianfeng@...o.com> wrote:
>
> Use int instead of uint32_t for 'ret' variable to store negative error
> codes or zero returned by other functions.
>
> Storing the negative error codes in unsigned type, doesn't cause an issue
> at runtime but can be confusing. Additionally, assigning negative error
> codes to unsigned type may trigger a GCC warning when the -Wsign-conversion
> flag is enabled.
>
> No effect on runtime.
>
> Signed-off-by: Qianfeng Rong <rongqianfeng@...o.com>
> ---
> drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c | 2 +-
> drivers/gpu/drm/amd/pm/powerplay/smumgr/smu7_smumgr.c | 2 +-
> drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c
> index 9a821563bc8e..14ccd743ca1d 100644
> --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c
> +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c
> @@ -1032,7 +1032,7 @@ static int smu10_print_clock_levels(struct pp_hwmgr *hwmgr,
> data->clock_vol_info.vdd_dep_on_fclk;
> uint32_t i, now, size = 0;
> uint32_t min_freq, max_freq = 0;
> - uint32_t ret = 0;
> + int ret = 0;
>
> switch (type) {
> case PP_SCLK:
> diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/smu7_smumgr.c b/drivers/gpu/drm/amd/pm/powerplay/smumgr/smu7_smumgr.c
> index baf51cd82a35..0d4cbe4113a0 100644
> --- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/smu7_smumgr.c
> +++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/smu7_smumgr.c
> @@ -401,7 +401,7 @@ int smu7_request_smu_load_fw(struct pp_hwmgr *hwmgr)
> int smu7_check_fw_load_finish(struct pp_hwmgr *hwmgr, uint32_t fw_type)
> {
> struct smu7_smumgr *smu_data = (struct smu7_smumgr *)(hwmgr->smu_backend);
> - uint32_t ret;
> + int ret;
>
> ret = phm_wait_on_indirect_register(hwmgr, mmSMC_IND_INDEX_11,
> smu_data->soft_regs_start + smum_get_offsetof(hwmgr,
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
> index e97b0cf19197..3baf20f4c373 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
> @@ -470,7 +470,7 @@ static int renoir_od_edit_dpm_table(struct smu_context *smu,
> static int renoir_set_fine_grain_gfx_freq_parameters(struct smu_context *smu)
> {
> uint32_t min = 0, max = 0;
> - uint32_t ret = 0;
> + int ret = 0;
>
> ret = smu_cmn_send_smc_msg_with_param(smu,
> SMU_MSG_GetMinGfxclkFrequency,
> --
> 2.34.1
>
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