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Message-Id: <DCK4I00CCR4R.2K7P9IEDI0OA2@bootlin.com>
Date: Thu, 04 Sep 2025 17:32:25 +0200
From: Théo Lebrun <theo.lebrun@...tlin.com>
To: "Santhosh Kumar K" <s-k6@...com>, <miquel.raynal@...tlin.com>,
<broonie@...nel.org>, <vigneshr@...com>, <marex@...x.de>,
<computersforpeace@...il.com>, <grmoore@...nsource.altera.com>
Cc: <linux-spi@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<praneeth@...com>, <p-mantena@...com>, <a-dutta@...com>, <u-kumar1@...com>
Subject: Re: [PATCH 3/4] spi: cadence-quadspi: Fix cqspi_setup_flash()
Hello Santhosh,
On Thu Sep 4, 2025 at 3:31 PM CEST, Santhosh Kumar K wrote:
> The 'max_cs' stores the largest chip select number. It should only
> be updated when the current 'cs' is greater than existing 'max_cs'. So,
> fix the condition accordingly.
Good catch. Current code can only work with one chip-select.
Reviewed-by: Théo Lebrun <theo.lebrun@...tlin.com>
Maybe we should error out if we don't enter the loop, ie if we have no
flash declared?
- Before your patch, cqspi->num_chipselect was set to num-cs DT prop or
CQSPI_MAX_CHIPSELECT as fallback.
- After your patch, cqspi->num_chipselect is set to one.
In neither case do we get an error if no flash is defined in DT.
We could either return some error code or set cqspi->num_chipselect=0
which will lead to spi_register_controller() to fail [0].
[0]: https://elixir.bootlin.com/linux/v6.16.4/source/drivers/spi/spi.c#L3322-L3329
Thanks,
--
Théo Lebrun, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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