linux-kernel - Re: [PATCH v3] iommu/amd: Add support for hw

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Message-ID: <cb5c0ec0-4255-4345-af1d-3356479c9ae1@amd.com>
Date: Thu, 4 Sep 2025 14:19:06 -0500
From: "Suthikulpanit, Suravee" <suravee.suthikulpanit@....com>
To: Jason Gunthorpe <jgg@...dia.com>
Cc: nicolinc@...dia.com, linux-kernel@...r.kernel.org, robin.murphy@....com,
 will@...nel.org, joro@...tes.org, kevin.tian@...el.com, jsnitsel@...hat.com,
 vasant.hegde@....com, iommu@...ts.linux.dev, santosh.shukla@....com,
 sairaj.arunkodilkar@....com, jon.grimm@....com, prashanthpra@...gle.com,
 wvw@...gle.com, wnliu@...gle.com, gptran@...gle.com, kpsingh@...gle.com
Subject: Re: [PATCH v3] iommu/amd: Add support for hw_info for iommu
 capability query



On 9/2/2025 6:57 AM, Jason Gunthorpe wrote:
> On Wed, Aug 27, 2025 at 04:23:09PM +0000, Suravee Suthikulpanit wrote:
>> AMD IOMMU Extended Feature (EFR) and Extended Feature 2 (EFR2) registers
>> specify features supported by each IOMMU hardware instance.
>> The IOMMU driver checks each feature-specific bits before enabling
>> each feature at run time.
>>
>> For IOMMUFD, the hypervisor passes the raw value of amd_iommu_efr and
>> amd_iommu_efr2 to VMM via iommufd IOMMU_DEVICE_GET_HW_INFO ioctl.
>>
>> Reviewed-by: Nicolin Chen <nicolinc@...dia.com>
>> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@....com>
> 
> Was there a reason this is not part of the other series?

Since this can be a standalone patch, I think it might be best to just 
focus on this in a separate submission.
> 
>> +obj-y += iommu.o init.o quirks.o io_pgtable.o io_pgtable_v2.o ppr.o pasid.o iommufd.o
> 
> Part of the point of another file is to not compile it when !CONFIG_IOMMUFD
> 
> So you should change the makefile and add some header magic:
> 
> #if IS_ENABLED(CONFIG_IOMMUFD)
> void *amd_iommufd_hw_info(struct device *dev, u32 *length, u32 *type);
> #else
> #define amd_iommufd_hw_info NULL
> #endif

Ok. Good point.

>> +/**
>> + * struct iommu_hw_info_amd - AMD IOMMU device info
>> + *
>> + * @efr : Value of AMD IOMMU Extended Feature Register (EFR) reported by hardware
>> + * @efr2: Value of AMD IOMMU Extended Feature 2 Register (EFR2) reported by hardware
>> + *
>> + * Please See description of these registers in the following sections of
>> + * the AMD I/O Virtualization Technology (IOMMU) Specification.
>> + * (https://docs.amd.com/v/u/en-US/48882_3.10_PUB)
>> + *
>> + * - MMIO Offset 0030h IOMMU Extended Feature Register
>> + * - MMIO Offset 01A0h IOMMU Extended Feature 2 Register
>> + */
> 
> It would be good to elaborate on the bits like ARM does for
> iommu_hw_info_arm_smmuv3 and where some of the bits should come from
> in other places in the API.
> 
> Jason

Got it.

I am sending out v4.

Thanks,
Suravee