linux-kernel - Re: [PATCH V3 1/2] dt-bindings: i3c: Add AMD I3C master controller support

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Message-ID: <c0859f5e-18fc-4981-9af4-6bfb2716e06d@amd.com>
Date: Thu, 4 Sep 2025 08:08:45 +0200
From: Michal Simek <michal.simek@....com>
To: Rob Herring <robh@...nel.org>,
 Manikanta Guntupalli <manikanta.guntupalli@....com>
Cc: git@....com, alexandre.belloni@...tlin.com, Frank.Li@....com,
 krzk+dt@...nel.org, conor+dt@...nel.org, kees@...nel.org,
 gustavoars@...nel.org, jarkko.nikula@...ux.intel.com,
 linux-i3c@...ts.infradead.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-hardening@...r.kernel.org,
 radhey.shyam.pandey@....com, srinivas.goud@....com,
 shubhrajyoti.datta@....com, manion05gk@...il.com
Subject: Re: [PATCH V3 1/2] dt-bindings: i3c: Add AMD I3C master controller
 support



On 9/3/25 22:47, Rob Herring wrote:
> On Wed, Sep 03, 2025 at 03:29:05PM +0530, Manikanta Guntupalli wrote:
>> Add device tree binding documentation for the AMD I3C master controller.
>>
>> Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@....com>
>> ---
>> Changes for V2:
>> Updated commit subject and description.
>> Moved allOf to after required.
>> Removed xlnx,num-targets property.
>>
>> Changes for V3:
>> Updated commit description.
>> Corrected the order of properties and removed resets property.
>> Added compatible to required list.
>> Added interrupts to example.
>> ---
>>   .../devicetree/bindings/i3c/xlnx,axi-i3c.yaml | 53 +++++++++++++++++++
>>   1 file changed, 53 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/i3c/xlnx,axi-i3c.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/i3c/xlnx,axi-i3c.yaml b/Documentation/devicetree/bindings/i3c/xlnx,axi-i3c.yaml
>> new file mode 100644
>> index 000000000000..32f73c31121e
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/i3c/xlnx,axi-i3c.yaml
>> @@ -0,0 +1,53 @@
>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/i3c/xlnx,axi-i3c.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: AMD I3C master
>> +
>> +maintainers:
>> +  - Manikanta Guntupalli <manikanta.guntupalli@....com>
>> +
>> +description:
>> +  The AXI-I3C IP is an I3C Controller with an AXI4-Lite interface, compatible
>> +  with the MIPI I3C Specification v1.1.1. The design includes bidirectional I/O
>> +  buffers that implement open collector drivers for the SDA and SCL signals.
>> +  External pull-up resistors are required to properly hold the bus at a Logic-1
>> +  level when the drivers are released.
>> +
>> +properties:
>> +  compatible:
>> +    const: xlnx,axi-i3c-1.0
> 
> Where does the version number come from? This must correspond to some
> h/w documentation or it is useless.

yes it corresponds to AXI I3C Bus Interface v1.0 Product Guide (PG439)
https://docs.amd.com/r/en-US/pg439-axi-i3c

All these soft IPs are using numbering schema.

Thanks,
Michal