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Message-ID: <20250904073151.686227-7-uwu@icenowy.me>
Date: Thu, 4 Sep 2025 15:31:50 +0800
From: Icenowy Zheng <uwu@...nowy.me>
To: Drew Fustini <fustini@...nel.org>,
Guo Ren <guoren@...nel.org>,
Fu Wei <wefu@...hat.com>,
Lucas Stach <l.stach@...gutronix.de>,
Russell King <linux+etnaviv@...linux.org.uk>,
Christian Gmeiner <christian.gmeiner@...il.com>,
David Airlie <airlied@...il.com>,
Simona Vetter <simona@...ll.ch>
Cc: Han Gao <rabenda.cn@...il.com>,
linux-riscv@...ts.infradead.org,
etnaviv@...ts.freedesktop.org,
linux-kernel@...r.kernel.org,
dri-devel@...ts.freedesktop.org,
Icenowy Zheng <uwu@...nowy.me>
Subject: [PATCH v2 6/7] drm/etnaviv: add shared context support for iommuv2
Unfortunately the GC620 GPU seems to have broken PTA capibility, and
switching page table ID in command stream after it's running won't work.
As directly switching mtlb isn't working either, there will be no
reliable way to switch page table in the command stream, and a shared
context, like iommuv1, is needed.
Add support for this shared context situation. Shared context is set
when the broken PTA is known, and the context allocation code will be
made short circuit when a shared context is set.
Signed-off-by: Icenowy Zheng <uwu@...nowy.me>
---
Changes in v2:
- Add the shared_context cleanup code in etnaviv_iommuv2_free() to fix
issues when the GPU is closed and opened again.
drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c | 11 +++++++++++
drivers/gpu/drm/etnaviv/etnaviv_mmu.c | 1 +
drivers/gpu/drm/etnaviv/etnaviv_mmu.h | 2 ++
3 files changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c b/drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c
index 5654a604c70cf..16b89e72602a3 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_iommu_v2.c
@@ -63,6 +63,9 @@ static void etnaviv_iommuv2_free(struct etnaviv_iommu_context *context)
clear_bit(v2_context->id, context->global->v2.pta_alloc);
+ if (context->global->shared_context == context)
+ context->global->shared_context = NULL;
+
vfree(v2_context);
}
static int
@@ -273,6 +276,12 @@ etnaviv_iommuv2_context_alloc(struct etnaviv_iommu_global *global)
struct etnaviv_iommu_context *context;
mutex_lock(&global->lock);
+ if (global->shared_context) {
+ context = global->shared_context;
+ etnaviv_iommu_context_get(context);
+ mutex_unlock(&global->lock);
+ return context;
+ }
v2_context = vzalloc(sizeof(*v2_context));
if (!v2_context)
@@ -301,6 +310,8 @@ etnaviv_iommuv2_context_alloc(struct etnaviv_iommu_global *global)
mutex_init(&context->lock);
INIT_LIST_HEAD(&context->mappings);
drm_mm_init(&context->mm, SZ_4K, (u64)SZ_1G * 4 - SZ_4K);
+ if (global->v2.broken_pta)
+ global->shared_context = context;
mutex_unlock(&global->lock);
return context;
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_mmu.c b/drivers/gpu/drm/etnaviv/etnaviv_mmu.c
index df5192083b201..a0f9c950504e0 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_mmu.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_mmu.c
@@ -504,6 +504,7 @@ int etnaviv_iommu_global_init(struct etnaviv_gpu *gpu)
memset32(global->bad_page_cpu, 0xdead55aa, SZ_4K / sizeof(u32));
if (version == ETNAVIV_IOMMU_V2) {
+ global->v2.broken_pta = gpu->identity.model == chipModel_GC620;
global->v2.pta_cpu = dma_alloc_wc(dev, ETNAVIV_PTA_SIZE,
&global->v2.pta_dma, GFP_KERNEL);
if (!global->v2.pta_cpu)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_mmu.h b/drivers/gpu/drm/etnaviv/etnaviv_mmu.h
index 2ec4acda02bc6..5627d2a0d0237 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_mmu.h
+++ b/drivers/gpu/drm/etnaviv/etnaviv_mmu.h
@@ -55,6 +55,8 @@ struct etnaviv_iommu_global {
u64 *pta_cpu;
dma_addr_t pta_dma;
DECLARE_BITMAP(pta_alloc, ETNAVIV_PTA_ENTRIES);
+ /* Whether runtime switching page table ID will fail */
+ bool broken_pta;
} v2;
};
--
2.51.0
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