linux-kernel - Re: [PATCH v5 03/27] clk: mediatek: clk-mux: Add ops for mux gates with set/clr/upd and FENC

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <CAGXv+5ELv9vR7i_Xd7XCC7gBciMXPfQfDAD1WyNy89=pJaLC_w@mail.gmail.com>
Date: Fri, 5 Sep 2025 12:09:54 +0800
From: Chen-Yu Tsai <wenst@...omium.org>
To: Laura Nao <laura.nao@...labora.com>
Cc: mturquette@...libre.com, sboyd@...nel.org, robh@...nel.org, 
	krzk+dt@...nel.org, conor+dt@...nel.org, matthias.bgg@...il.com, 
	angelogioacchino.delregno@...labora.com, p.zabel@...gutronix.de, 
	richardcochran@...il.com, guangjie.song@...iatek.com, 
	linux-clk@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, 
	linux-mediatek@...ts.infradead.org, netdev@...r.kernel.org, 
	kernel@...labora.com, Nícolas F . R . A . Prado <nfraprado@...labora.com>
Subject: Re: [PATCH v5 03/27] clk: mediatek: clk-mux: Add ops for mux gates
 with set/clr/upd and FENC

On Fri, Aug 29, 2025 at 5:20 PM Laura Nao <laura.nao@...labora.com> wrote:
>
> MT8196 uses set/clr/upd registers for mux gate enable/disable control,
> along with a FENC bit to check the status. Add new set of mux gate
> clock operations with support for set/clr/upd and FENC status logic.
>
> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@...labora.com>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
> Signed-off-by: Laura Nao <laura.nao@...labora.com>

Reviewed-by: Chen-Yu Tsai <wenst@...omium.org>