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Message-ID: <6a050b35-1b4d-4ea1-aa40-974aafa89b52@arm.com>
Date: Fri, 5 Sep 2025 19:49:08 +0100
From: James Morse <james.morse@....com>
To: Ben Horgan <ben.horgan@....com>, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-acpi@...r.kernel.org,
devicetree@...r.kernel.org
Cc: shameerali.kolothum.thodi@...wei.com,
D Scott Phillips OS <scott@...amperecomputing.com>,
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bobo.shaobowang@...wei.com, tan.shaopeng@...itsu.com,
baolin.wang@...ux.alibaba.com, Jamie Iles <quic_jiles@...cinc.com>,
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dfustini@...libre.com, amitsinght@...vell.com,
David Hildenbrand <david@...hat.com>, Rex Nie <rex.nie@...uarmicro.com>,
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<guohanjun@...wei.com>, Sudeep Holla <sudeep.holla@....com>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>,
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Danilo Krummrich <dakr@...nel.org>
Subject: Re: [PATCH 10/33] arm_mpam: Add probe/remove for mpam msc driver and
kbuild boiler plate
Hi Ben,
On 01/09/2025 10:11, Ben Horgan wrote:
> On 8/22/25 16:29, James Morse wrote:
>> Probing MPAM is convoluted. MSCs that are integrated with a CPU may
>> only be accessible from those CPUs, and they may not be online.
>> Touching the hardware early is pointless as MPAM can't be used until
>> the system-wide common values for num_partid and num_pmg have been
>> discovered.
>>
>> Start with driver probe/remove and mapping the MSC.
>> diff --git a/drivers/resctrl/mpam_internal.h b/drivers/resctrl/mpam_internal.h
>> new file mode 100644
>> index 000000000000..07e0f240eaca
>> --- /dev/null
>> +++ b/drivers/resctrl/mpam_internal.h
>> @@ -0,0 +1,62 @@
>> +struct mpam_msc {
>> + /* member of mpam_all_msc */
>> + struct list_head glbl_list;
>> +
>> + int id;
>> + struct platform_device *pdev;
>> +
>> + /* Not modified after mpam_is_enabled() becomes true */
>> + enum mpam_msc_iface iface;
>> + u32 pcc_subspace_id;
>> + struct mbox_client pcc_cl;
>> + struct pcc_mbox_chan *pcc_chan;
>> + u32 nrdy_usec;
>> + cpumask_t accessibility;
>> +
>> + /*
>> + * probe_lock is only take during discovery. After discovery these
>> + * properties become read-only and the lists are protected by SRCU.
>> + */
>> + struct mutex probe_lock;
>> + unsigned long ris_idxs[128 / BITS_PER_LONG];
> Why is this sized this way? RIS_MAX is 4 bits and so there are at most
> 16 RIS per msc.
Hmmm, lost in time - I agree with the 16 reasoning. Fixed.
(It's likely due to RES0 space above the field - but that has been filled in with other
stuff since then. RIS was added as a 'backward compatible feature' - I was wary of them
extending it)
>> + u32 ris_max;
>> +
>> + /* mpam_msc_ris of this component */
>> + struct list_head ris;
>> +
>> + /*
>> + * part_sel_lock protects access to the MSC hardware registers that are
>> + * affected by MPAMCFG_PART_SEL. (including the ID registers that vary
>> + * by RIS).
>> + * If needed, take msc->lock first.
>> + */
>> + struct mutex part_sel_lock;
>> +
>> + /*
>> + * mon_sel_lock protects access to the MSC hardware registers that are
>> + * affeted by MPAMCFG_MON_SEL.
>> + * If needed, take msc->lock first.
>> + */
>> + struct mutex outer_mon_sel_lock;
>> + raw_spinlock_t inner_mon_sel_lock;
>> + unsigned long inner_mon_sel_flags;
>> +
>> + void __iomem *mapped_hwpage;
>> + size_t mapped_hwpage_sz;
>> +};
>> +
>> +#endif /* MPAM_INTERNAL_H */
Thanks,
James
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