[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <9e0c355c-8b19-438e-98d9-d6290a562863@ti.com>
Date: Fri, 5 Sep 2025 10:48:51 +0530
From: Akashdeep Kaur <a-kaur@...com>
To: "Kumar, Udit" <u-kumar1@...com>, <praneeth@...com>, <nm@...com>,
<afd@...com>, <vigneshr@...com>, <d-gole@...com>, <kristo@...nel.org>,
<robh@...nel.org>, <krzk+dt@...nel.org>, <conor+dt@...nel.org>,
<linux-arm-kernel@...ts.infradead.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
CC: <vishalm@...com>, <sebin.francis@...com>
Subject: Re: [PATCH v3 3/3] arm64: dts: ti: k3-pinctrl: Add the remaining
macros
On 05/09/25 10:27, Kumar, Udit wrote:
>
> On 9/4/2025 7:16 PM, Akashdeep Kaur wrote:
>> Hi Udit,
>>
>> On 04/09/25 18:06, Kumar, Udit wrote:
>>>
>>
>> ...
>>
>>>> ...
>>>>>> #define PULLTYPESEL_SHIFT (17)
>>>>>> #define RXACTIVE_SHIFT (18)
>>>>>> +#define DRV_STR_SHIFT (19)
>>>>>
>>>>> referring to above TRM mentioned in commit message
>>>>>
>>>>> Bit 20-19 are for DRV_STR, and description says
>>>>>
>>>>> 0 - Default
>>>>> 1 - Reserved
>>>>> 2 - Reserved
>>>>> 3 - Reserved
>>>>>
>>>>> Not sure, is there some additional document to be referred for
>>>>> PIN_DRIVE_STRENGTH
>>>>
>>>> This information will be updated in TRM in coming cycles.
>>>
>>>
>>> Sorry ,
>>>
>>> can not ack before TRM update
>>
>> The information can be found at https://www.ti.com/lit/ug/spruj83b/
>> spruj83b.pdf in Table 14-8769. Description Of The Pad Configuration
>> Register Bit
>
>
> Then please give correct reference in commit message
Updated the commit message!
>
>
>
>>
>>>
>>>
>>>
>>>>>
>>>>>
>>>>>> +#define DS_ISO_OVERRIDE_SHIFT (22)
>>>>>> +#define DS_ISO_BYPASS_EN_SHIFT (23)
>>>>>
>>
>> ...
>>
>>>>>
>>>>>> /* Default mux configuration for gpio-ranges to use with pinctrl */
>>>>>> #define PIN_GPIO_RANGE_IOPAD (PIN_INPUT | 7)
>>>>
>>>> Regards,
>>>> Akashdeep Kaur
>>
>> Thanks,
>> Akashdeep Kaur
>>
Powered by blists - more mailing lists