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Message-ID: <2c681013-ca03-4f0f-8fe9-44475a97dfef@collabora.com>
Date: Fri, 5 Sep 2025 10:11:52 +0200
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: Chen-Yu Tsai <wenst@...omium.org>, Laura Nao <laura.nao@...labora.com>
Cc: mturquette@...libre.com, sboyd@...nel.org, robh@...nel.org,
krzk+dt@...nel.org, conor+dt@...nel.org, matthias.bgg@...il.com,
p.zabel@...gutronix.de, richardcochran@...il.com,
guangjie.song@...iatek.com, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org,
netdev@...r.kernel.org, kernel@...labora.com
Subject: Re: [PATCH v5 14/27] clk: mediatek: Add MT8196 peripheral clock
support
Il 05/09/25 07:05, Chen-Yu Tsai ha scritto:
> On Fri, Aug 29, 2025 at 5:21 PM Laura Nao <laura.nao@...labora.com> wrote:
>>
>> Add support for the MT8196 peripheral clock controller, which provides
>> clock gate control for dma/flashif/msdc/pwm/spi/uart.
>>
>> Signed-off-by: Laura Nao <laura.nao@...labora.com>
>
> Not sure why CLK_OPS_PARENT_ENABLE was removed, but it does seem like the
> right thing to do, since this block is always on and doesn't require a
> clock to be enabled before accessing the registers.
>
> Reviewed-by: Chen-Yu Tsai <wenst@...omium.org> # CLK_OPS_PARENT_ENABLE change
>
> Note that I did not go through the bit definitions. I assume the other
> Collabora folks did a good job of reviewing those.
Yes, I did :-)
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
Cheers,
Angelo
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