linux-kernel - RE: [PATCH v5] PCI: imx6: Enable the vpcie3v3aux regulator when fetch it

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Message-ID:
 <AS8PR04MB8833550F479E80555481BDA58C03A@AS8PR04MB8833.eurprd04.prod.outlook.com>
Date: Fri, 5 Sep 2025 01:40:22 +0000
From: Hongxing Zhu <hongxing.zhu@....com>
To: Manivannan Sadhasivam <mani@...nel.org>
CC: Frank Li <frank.li@....com>, "l.stach@...gutronix.de"
	<l.stach@...gutronix.de>, "lpieralisi@...nel.org" <lpieralisi@...nel.org>,
	"kwilczynski@...nel.org" <kwilczynski@...nel.org>, "robh@...nel.org"
	<robh@...nel.org>, "krzk+dt@...nel.org" <krzk+dt@...nel.org>,
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	"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>, "kernel@...gutronix.de"
	<kernel@...gutronix.de>, "festevam@...il.com" <festevam@...il.com>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
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	<linux-arm-kernel@...ts.infradead.org>, "devicetree@...r.kernel.org"
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	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v5] PCI: imx6: Enable the vpcie3v3aux regulator when fetch
 it

> -----Original Message-----
> From: Manivannan Sadhasivam <mani@...nel.org>
> Sent: 2025年9月5日 1:10
> To: Hongxing Zhu <hongxing.zhu@....com>
> Cc: Frank Li <frank.li@....com>; l.stach@...gutronix.de;
> lpieralisi@...nel.org; kwilczynski@...nel.org; robh@...nel.org;
> krzk+dt@...nel.org; conor+dt@...nel.org; bhelgaas@...gle.com;
> shawnguo@...nel.org; s.hauer@...gutronix.de; kernel@...gutronix.de;
> festevam@...il.com; linux-pci@...r.kernel.org;
> linux-arm-kernel@...ts.infradead.org; devicetree@...r.kernel.org;
> imx@...ts.linux.dev; linux-kernel@...r.kernel.org
> Subject: Re: [PATCH v5] PCI: imx6: Enable the vpcie3v3aux regulator when
> fetch it
> 
> On Wed, Aug 20, 2025 at 10:23:28AM GMT, Richard Zhu wrote:
> > Refer to PCIe CEM r6.0, sec 2.3 WAKE# Signal, WAKE# signal is only
> > asserted by the Add-in Card when all its functions are in D3Cold state
> > and at least one of its functions is enabled for wakeup generation.
> > The 3.3V auxiliary power (+3.3Vaux) must be present and used for
> > wakeup process.
> >
> > When the 3.3V auxiliary power is present, fetch this auxiliary
> > regulator at probe time and keep it enabled for the entire PCIe
> > controller lifecycle. This ensures support for outbound wake-up
> > mechanism such as WAKE# signaling.
> >
> > Signed-off-by: Richard Zhu <hongxing.zhu@....com>
> > ---
> > v5 changes:
> > - Use the vpcie3v3aux property instead of adding a duplicated one.
> > - Move the comments from the code changes into the description of
> >   commit.
> >
> > v4 changes:
> > Move the dt-binding to snps,dw-pcie-common.yaml.
> >
> > v3 changes:
> > Add a new vaux power supply used to specify the regulator powered up
> > the WAKE# circuit on the connector when WAKE# is supported.
> >
> > v2 changes:
> > Update the commit message, and add reviewed-by from Frank.
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatc
> >
> hwork.kernel.org%2Fproject%2Flinux-pci%2Fpatch%2F20250619072438.12592
> 1
> >
> -1-hongxing.zhu%40nxp.com%2F&data=05%7C02%7Chongxing.zhu%40nxp.co
> m%7C3
> >
> 19a7d203805468577cb08ddebd5dad5%7C686ea1d3bc2b4c6fa92cd99c5c3016
> 35%7C0
> > %7C0%7C638926025929715326%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0e
> U1hcGkiOnRy
> >
> dWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3
> D%
> >
> 3D%7C0%7C%7C%7C&sdata=3Arx%2F%2FsvN05%2FopB8IL3C4b%2FvLc1dinf1
> ylJQkjfs
> > 670%3D&reserved=0
> > ---
> >  drivers/pci/controller/dwc/pci-imx6.c | 4 ++++
> >  1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/pci/controller/dwc/pci-imx6.c
> > b/drivers/pci/controller/dwc/pci-imx6.c
> > index 5a38cfaf989b1..5067da14bc053 100644
> > --- a/drivers/pci/controller/dwc/pci-imx6.c
> > +++ b/drivers/pci/controller/dwc/pci-imx6.c
> > @@ -1739,6 +1739,10 @@ static int imx_pcie_probe(struct
> platform_device *pdev)
> >  	pci->max_link_speed = 1;
> >  	of_property_read_u32(node, "fsl,max-link-speed",
> > &pci->max_link_speed);
> >
> > +	ret = devm_regulator_get_enable_optional(&pdev->dev, "vpcie3v3aux");
> > +	if (ret < 0 && ret != -ENODEV)
> > +		return dev_err_probe(dev, ret, "failed to enable pcie3v3vaux");
> > +
> 
> So if Vaux is available, do we still need the IMX95_PCIE_SYS_AUX_PWR_DET
> setting in imx95_pcie_init_phy()?[Richard Zhu] 
Hi Mani:
Thanks for your comments.
Yes, it's still required. Regarding my understands, the Vaux here is one chip
inside power rail, used to power up some design logic mandatory required in
the L2 mode. The vpcie3v3aux is the regulator used to power up signals on
 the connector. They are different.

Best Regards
Richard Zhu
> 
> - Mani
> 
> --
> மணிவண்ணன் சதாசிவம்