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Message-ID:
 <MN0PR12MB5953092ADFCB9B5D7B1BE807B703A@MN0PR12MB5953.namprd12.prod.outlook.com>
Date: Fri, 5 Sep 2025 08:50:00 +0000
From: "Pandey, Radhey Shyam" <radhey.shyam.pandey@....com>
To: "Gupta, Suraj" <Suraj.Gupta2@....com>, "vkoul@...nel.org"
	<vkoul@...nel.org>, "Simek, Michal" <michal.simek@....com>
CC: "dmaengine@...r.kernel.org" <dmaengine@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>
Subject: RE: [PATCH] dmaengine: xilinx_dma: Fix uninitialized addr_width when
 "xlnx,addrwidth" property is missing

[AMD Official Use Only - AMD Internal Distribution Only]

> -----Original Message-----
> From: Suraj Gupta <suraj.gupta2@....com>
> Sent: Friday, September 5, 2025 12:18 PM
> To: vkoul@...nel.org; Simek, Michal <michal.simek@....com>; Pandey, Radhey
> Shyam <radhey.shyam.pandey@....com>
> Cc: dmaengine@...r.kernel.org; linux-arm-kernel@...ts.infradead.org; linux-
> kernel@...r.kernel.org
> Subject: [PATCH] dmaengine: xilinx_dma: Fix uninitialized addr_width when
> "xlnx,addrwidth" property is missing
>
> When device tree lacks optional "xlnx,addrwidth" property, the addr_width
> variable remained uninitialized with garbage values, causing incorrect
> DMA mask configuration and subsequent probe failure. The fix ensures a
> fallback to the default 32-bit address width when this property is missing.
>
> Signed-off-by: Suraj Gupta <suraj.gupta2@....com>
> Fixes: b72db4005fe4 ("dmaengine: vdma: Add 64 bit addressing support to the
> driver")

Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@....com>
Thanks!

> ---
>  drivers/dma/xilinx/xilinx_dma.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
> index fabff602065f..89a8254d9cdc 100644
> --- a/drivers/dma/xilinx/xilinx_dma.c
> +++ b/drivers/dma/xilinx/xilinx_dma.c
> @@ -131,6 +131,7 @@
>  #define XILINX_MCDMA_MAX_CHANS_PER_DEVICE    0x20
>  #define XILINX_DMA_MAX_CHANS_PER_DEVICE              0x2
>  #define XILINX_CDMA_MAX_CHANS_PER_DEVICE     0x1
> +#define XILINX_DMA_DFAULT_ADDRWIDTH          0x20
>
>  #define XILINX_DMA_DMAXR_ALL_IRQ_MASK        \
>               (XILINX_DMA_DMASR_FRM_CNT_IRQ | \
> @@ -3159,7 +3160,7 @@ static int xilinx_dma_probe(struct platform_device *pdev)
>       struct device_node *node = pdev->dev.of_node;
>       struct xilinx_dma_device *xdev;
>       struct device_node *child, *np = pdev->dev.of_node;
> -     u32 num_frames, addr_width, len_width;
> +     u32 num_frames, addr_width = XILINX_DMA_DFAULT_ADDRWIDTH,
> len_width;
>       int i, err;
>
>       /* Allocate and initialize the DMA engine structure */
> @@ -3235,7 +3236,9 @@ static int xilinx_dma_probe(struct platform_device *pdev)
>
>       err = of_property_read_u32(node, "xlnx,addrwidth", &addr_width);
>       if (err < 0)
> -             dev_warn(xdev->dev, "missing xlnx,addrwidth property\n");
> +             dev_warn(xdev->dev,
> +                      "missing xlnx,addrwidth property, using default value %d\n",
> +                      XILINX_DMA_DFAULT_ADDRWIDTH);
>
>       if (addr_width > 32)
>               xdev->ext_addr = true;
> --
> 2.25.1


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