linux-kernel - Re: [PATCH 4/4] spi: cadence-quadspi: Use BIT() macros where possible

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Message-ID: <580f00f4-ee1a-4e78-a028-18cdb3b01119@ti.com>
Date: Fri, 5 Sep 2025 16:34:59 +0530
From: Santhosh Kumar K <s-k6@...com>
To: Pratyush Yadav <pratyush@...nel.org>
CC: <miquel.raynal@...tlin.com>, <broonie@...nel.org>, <vigneshr@...com>,
        <marex@...x.de>, <computersforpeace@...il.com>,
        <grmoore@...nsource.altera.com>, <theo.lebrun@...tlin.com>,
        <linux-spi@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <praneeth@...com>, <p-mantena@...com>, <a-dutta@...com>,
        <u-kumar1@...com>, <s-k6@...com>
Subject: Re: [PATCH 4/4] spi: cadence-quadspi: Use BIT() macros where possible



On 04/09/25 20:19, Pratyush Yadav wrote:
> On Thu, Sep 04 2025, Santhosh Kumar K wrote:
> 
>> From: Vignesh Raghavendra <vigneshr@...com>
>>
>> Convert few open coded bit shifts to BIT() macro for better readability.
>> No functional changes intended.
>>
>> Signed-off-by: Vignesh Raghavendra <vigneshr@...com>
>> Signed-off-by: Santhosh Kumar K <s-k6@...com>
> 
> I see there are total 7 hits for the pattern "1 <<". Why not convert
> them all while you're at it?

Yeah, I just checked - I'll convert them as well.

Regards,
Santhosh.

> 
>> ---
>>   drivers/spi/spi-cadence-quadspi.c | 6 +++---
>>   1 file changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
>> index da3ec15abb3e..b18f095516f2 100644
>> --- a/drivers/spi/spi-cadence-quadspi.c
>> +++ b/drivers/spi/spi-cadence-quadspi.c
>> @@ -335,7 +335,7 @@ static bool cqspi_is_idle(struct cqspi_st *cqspi)
>>   {
>>   	u32 reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);
>>   
>> -	return reg & (1UL << CQSPI_REG_CONFIG_IDLE_LSB);
>> +	return reg & BIT(CQSPI_REG_CONFIG_IDLE_LSB);
>>   }
>>   
>>   static u32 cqspi_get_rd_sram_level(struct cqspi_st *cqspi)
>> @@ -571,7 +571,7 @@ static int cqspi_command_read(struct cqspi_flash_pdata *f_pdata,
>>   		reg |= (dummy_clk & CQSPI_REG_CMDCTRL_DUMMY_MASK)
>>   		     << CQSPI_REG_CMDCTRL_DUMMY_LSB;
>>   
>> -	reg |= (0x1 << CQSPI_REG_CMDCTRL_RD_EN_LSB);
>> +	reg |= BIT(CQSPI_REG_CMDCTRL_RD_EN_LSB);
>>   
>>   	/* 0 means 1 byte. */
>>   	reg |= (((n_rx - 1) & CQSPI_REG_CMDCTRL_RD_BYTES_MASK)
>> @@ -1191,7 +1191,7 @@ static void cqspi_chipselect(struct cqspi_flash_pdata *f_pdata)
>>   		 * CS2 to 4b'1011
>>   		 * CS3 to 4b'0111
>>   		 */
>> -		chip_select = 0xF & ~(1 << chip_select);
>> +		chip_select = 0xF & ~BIT(chip_select);
>>   	}
>>   
>>   	reg &= ~(CQSPI_REG_CONFIG_CHIPSELECT_MASK
>