linux-kernel - Re: [PATCH v3 2/3] iio: adc: Add driver for Marvell 88PM886 PMIC ADC

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Message-Id: <DCLQ427JYUS9.3EKILJ8O80RU1@matfyz.cz>
Date: Sat, 06 Sep 2025 14:41:17 +0200
From: "Karel Balej" <balejk@...fyz.cz>
To: Duje Mihanović <duje@...emihanovic.xyz>,
        "Jonathan
 Cameron" <jic23@...nel.org>,
        "David Lechner" <dlechner@...libre.com>,
        Nuno Sá <nuno.sa@...log.com>,
        "Andy Shevchenko"
 <andy@...nel.org>, "Lee Jones" <lee@...nel.org>,
        "Rob Herring"
 <robh@...nel.org>,
        "Krzysztof Kozlowski" <krzk+dt@...nel.org>,
        "Conor
 Dooley" <conor+dt@...nel.org>
Cc: "David Wronek" <david@...nlining.org>, <phone-devel@...r.kernel.org>,
        <~postmarketos/upstreaming@...ts.sr.ht>,
        <linux-kernel@...r.kernel.org>, <linux-iio@...r.kernel.org>,
        <devicetree@...r.kernel.org>
Subject: Re: [PATCH v3 2/3] iio: adc: Add driver for Marvell 88PM886 PMIC
 ADC

Duje Mihanović, 2025-09-05T13:00:55+02:00:
> diff --git a/include/linux/mfd/88pm886.h b/include/linux/mfd/88pm886.h
> index 85eca44f39ab58ba4cb9ec4216118ee9604d021f..38892ba7b8a42bbecb53621a891a52a2fd70fd43 100644
> --- a/include/linux/mfd/88pm886.h
> +++ b/include/linux/mfd/88pm886.h
> @@ -10,6 +10,7 @@
>  #define PM886_IRQ_ONKEY			0
>  
>  #define PM886_PAGE_OFFSET_REGULATORS	1
> +#define PM886_PAGE_OFFSET_GPADC		2
>  
>  #define PM886_REG_ID			0x00
>  
> @@ -70,6 +71,63 @@
>  #define PM886_LDO_VSEL_MASK		0x0f
>  #define PM886_BUCK_VSEL_MASK		0x7f
>  
> +/* GPADC enable/disable registers */
> +#define PM886_REG_GPADC_CONFIG(n)	(n)
> +
> +#define PM886_GPADC_VSC_EN		BIT(0)
> +#define PM886_GPADC_VBAT_EN		BIT(1)
> +#define PM886_GPADC_GNDDET1_EN		BIT(3)
> +#define PM886_GPADC_VBUS_EN		BIT(4)
> +#define PM886_GPADC_VCHG_PWR_EN		BIT(5)
> +#define PM886_GPADC_VCF_OUT_EN		BIT(6)
> +#define PM886_GPADC_CONFIG1_EN_ALL	\
> +	(PM886_GPADC_VSC_EN |		\
> +	 PM886_GPADC_VBAT_EN |		\
> +	 PM886_GPADC_GNDDET1_EN |	\
> +	 PM886_GPADC_VBUS_EN |		\
> +	 PM886_GPADC_VCHG_PWR_EN |	\
> +	 PM886_GPADC_VCF_OUT_EN)
> +
> +#define PM886_GPADC_TINT_EN		BIT(0)
> +#define PM886_GPADC_PMODE_EN		BIT(1)
> +#define PM886_GPADC_GPADC0_EN		BIT(2)
> +#define PM886_GPADC_GPADC1_EN		BIT(3)
> +#define PM886_GPADC_GPADC2_EN		BIT(4)
> +#define PM886_GPADC_GPADC3_EN		BIT(5)
> +#define PM886_GPADC_MIC_DET_EN		BIT(6)
> +#define PM886_GPADC_CONFIG2_EN_ALL	\
> +	(PM886_GPADC_TINT_EN |		\
> +	 PM886_GPADC_GPADC0_EN |	\
> +	 PM886_GPADC_GPADC1_EN |	\
> +	 PM886_GPADC_GPADC2_EN |	\
> +	 PM886_GPADC_GPADC3_EN |	\
> +	 PM886_GPADC_MIC_DET_EN)
> +
> +/* No CONFIG3_EN_ALL because this is the only bit there. */
> +#define PM886_GPADC_GND_DET2_EN		BIT(0)
> +
> +/* GPADC channel registers */
> +#define PM886_REG_GPADC_VSC		0x40
> +#define PM886_REG_GPADC_VCHG_PWR	0x4c
> +#define PM886_REG_GPADC_VCF_OUT		0x4e
> +#define PM886_REG_GPADC_TINT		0x50
> +#define PM886_REG_GPADC_GPADC0		0x54
> +#define PM886_REG_GPADC_GPADC1		0x56
> +#define PM886_REG_GPADC_GPADC2		0x58
> +#define PM886_REG_GPADC_VBAT		0xa0
> +#define PM886_REG_GPADC_GND_DET1	0xa4
> +#define PM886_REG_GPADC_GND_DET2	0xa6
> +#define PM886_REG_GPADC_VBUS		0xa8
> +#define PM886_REG_GPADC_GPADC3		0xaa
> +#define PM886_REG_GPADC_MIC_DET		0xac
> +#define PM886_REG_GPADC_VBAT_SLP	0xb0
> +
> +/* VBAT_SLP is the last register and is 2 bytes wide like other channels. */
> +#define PM886_GPADC_MAX_REGISTER	(PM886_REG_GPADC_VBAT_SLP + 1)
> +
> +#define PM886_GPADC_BIAS_LEVELS		16
> +#define PM886_GPADC_INDEX_TO_BIAS_uA(i)	(1 + (i) * 5)
> +
>  struct pm886_chip {
>  	struct i2c_client *client;
>  	unsigned int chip_id;

Acked-by: Karel Balej <balejk@...fyz.cz> # for the PMIC