linux-kernel - Re: [PATCH v3 1/4] irqchip/aspeed-scu-ic: Refactor driver to support variant-based initialization

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Message-ID: <202509070058.3Z4AtICl-lkp@intel.com>
Date: Sun, 7 Sep 2025 01:12:31 +0800
From: kernel test robot <lkp@...el.com>
To: Ryan Chen <ryan_chen@...eedtech.com>,
	Eddie James <eajames@...ux.ibm.com>,
	Thomas Gleixner <tglx@...utronix.de>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>, Joel Stanley <joel@....id.au>,
	Andrew Jeffery <andrew@...econstruct.com.au>,
	Lee Jones <lee@...nel.org>, linux-aspeed@...ts.ozlabs.org,
	linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org
Cc: llvm@...ts.linux.dev, oe-kbuild-all@...ts.linux.dev
Subject: Re: [PATCH v3 1/4] irqchip/aspeed-scu-ic: Refactor driver to support
 variant-based initialization

Hi Ryan,

kernel test robot noticed the following build warnings:

[auto build test WARNING on tip/irq/core]
[also build test WARNING on robh/for-next lee-mfd/for-mfd-next lee-mfd/for-mfd-fixes linus/master v6.17-rc4 next-20250905]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Ryan-Chen/irqchip-aspeed-scu-ic-Refactor-driver-to-support-variant-based-initialization/20250906-095043
base:   tip/irq/core
patch link:    https://lore.kernel.org/r/20250906014846.861368-2-ryan_chen%40aspeedtech.com
patch subject: [PATCH v3 1/4] irqchip/aspeed-scu-ic: Refactor driver to support variant-based initialization
config: arm-randconfig-001-20250906 (https://download.01.org/0day-ci/archive/20250907/202509070058.3Z4AtICl-lkp@intel.com/config)
compiler: clang version 22.0.0git (https://github.com/llvm/llvm-project 7fb1dc08d2f025aad5777bb779dfac1197e9ef87)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250907/202509070058.3Z4AtICl-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@...el.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202509070058.3Z4AtICl-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/irqchip/irq-aspeed-scu-ic.c:79:34: warning: variable 'mask' is uninitialized when used here [-Wuninitialized]
      79 |                 writel((readl(scu_ic->base) & ~mask) |
         |                                                ^~~~
   drivers/irqchip/irq-aspeed-scu-ic.c:55:24: note: initialize the variable 'mask' to silence this warning
      55 |         unsigned int sts, mask;
         |                               ^
         |                                = 0
   1 warning generated.


vim +/mask +79 drivers/irqchip/irq-aspeed-scu-ic.c

    49	
    50	static void aspeed_scu_ic_irq_handler(struct irq_desc *desc)
    51	{
    52		struct aspeed_scu_ic *scu_ic = irq_desc_get_handler_data(desc);
    53		struct irq_chip *chip = irq_desc_get_chip(desc);
    54		unsigned long bit, enabled, max, status;
    55		unsigned int sts, mask;
    56	
    57		chained_irq_enter(chip, desc);
    58	
    59		/*
    60		 * The SCU IC has just one register to control its operation and read
    61		 * status. The interrupt enable bits occupy the lower 16 bits of the
    62		 * register, while the interrupt status bits occupy the upper 16 bits.
    63		 * The status bit for a given interrupt is always 16 bits shifted from
    64		 * the enable bit for the same interrupt.
    65		 * Therefore, perform the IRQ operations in the enable bit space by
    66		 * shifting the status down to get the mapping and then back up to
    67		 * clear the bit.
    68		 */
    69		sts = readl(scu_ic->base);
    70		enabled = sts & scu_ic->irq_enable;
    71		status = (sts >> ASPEED_SCU_IC_STATUS_SHIFT) & enabled;
    72	
    73		bit = scu_ic->irq_shift;
    74		max = scu_ic->num_irqs + bit;
    75	
    76		for_each_set_bit_from(bit, &status, max) {
    77			generic_handle_domain_irq(scu_ic->irq_domain,
    78						  bit - scu_ic->irq_shift);
  > 79			writel((readl(scu_ic->base) & ~mask) |
    80			       BIT(bit + ASPEED_SCU_IC_STATUS_SHIFT),
    81			       scu_ic->base);
    82		}
    83	
    84		chained_irq_exit(chip, desc);
    85	}
    86	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki