lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <282ca7c4-7213-4e5d-9936-63687b5f4928@tuxon.dev>
Date: Sat, 6 Sep 2025 21:36:41 +0300
From: claudiu beznea <claudiu.beznea@...on.dev>
To: Ryan.Wanner@...rochip.com, mturquette@...libre.com, sboyd@...nel.org,
 nicolas.ferre@...rochip.com, alexandre.belloni@...tlin.com
Cc: varshini.rajendran@...rochip.com, linux-clk@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
 robh@...nel.org
Subject: Re: [PATCH v3 09/32] clk: at91: clk-programmable: use clk_parent_data



On 7/10/25 23:07, Ryan.Wanner@...rochip.com wrote:
> From: Claudiu Beznea <claudiu.beznea@...on.dev>
> 
> Use struct clk_parent_data instead of struct parent_hw as this leads
> to less usage of __clk_get_hw() in SoC specific clock drivers and simpler
> conversion of existing SoC specific clock drivers from parent_names to
> modern clk_parent_data structures.
> 
> Signed-off-by: Claudiu Beznea <claudiu.beznea@...on.dev>
> [ryan.wanner@...rochip.com: Add the clk-programmable changes to the
> SAMA7D65 and SAM9X75 SoCs. Add td_slck_name variable and index for the
> SAM9X75.]
> Signed-off-by: Ryan Wanner <Ryan.Wanner@...rochip.com>
> ---
>   drivers/clk/at91/clk-programmable.c |  8 ++++----
>   drivers/clk/at91/pmc.h              |  2 +-
>   drivers/clk/at91/sam9x7.c           | 21 +++++++++++----------
>   drivers/clk/at91/sama7d65.c         | 20 ++++++++++----------
>   drivers/clk/at91/sama7g5.c          | 20 ++++++++++----------
>   5 files changed, 36 insertions(+), 35 deletions(-)
> 
> diff --git a/drivers/clk/at91/clk-programmable.c b/drivers/clk/at91/clk-programmable.c
> index 1195fb405503..275ca701f294 100644
> --- a/drivers/clk/at91/clk-programmable.c
> +++ b/drivers/clk/at91/clk-programmable.c
> @@ -215,7 +215,7 @@ static const struct clk_ops programmable_ops = {
>   struct clk_hw * __init
>   at91_clk_register_programmable(struct regmap *regmap,
>   			       const char *name, const char **parent_names,
> -			       struct clk_hw **parent_hws, u8 num_parents, u8 id,
> +			       struct clk_parent_data *parent_data, u8 num_parents, u8 id,
>   			       const struct clk_programmable_layout *layout,
>   			       u32 *mux_table)
>   {
> @@ -224,7 +224,7 @@ at91_clk_register_programmable(struct regmap *regmap,
>   	struct clk_init_data init = {};
>   	int ret;
>   
> -	if (id > PROG_ID_MAX || !(parent_names || parent_hws))
> +	if (id > PROG_ID_MAX || !(parent_names || parent_data))
>   		return ERR_PTR(-EINVAL);
>   
>   	prog = kzalloc(sizeof(*prog), GFP_KERNEL);
> @@ -233,8 +233,8 @@ at91_clk_register_programmable(struct regmap *regmap,
>   
>   	init.name = name;
>   	init.ops = &programmable_ops;
> -	if (parent_hws)
> -		init.parent_hws = (const struct clk_hw **)parent_hws;
> +	if (parent_data)
> +		init.parent_data = (const struct clk_parent_data *)parent_data;
>   	else
>   		init.parent_names = parent_names;
>   	init.num_parents = num_parents;
> diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
> index 54d472276fc9..34036f2d0578 100644
> --- a/drivers/clk/at91/pmc.h
> +++ b/drivers/clk/at91/pmc.h
> @@ -263,7 +263,7 @@ sam9x60_clk_register_frac_pll(struct regmap *regmap, spinlock_t *lock,
>   
>   struct clk_hw * __init
>   at91_clk_register_programmable(struct regmap *regmap, const char *name,
> -			       const char **parent_names, struct clk_hw **parent_hws,
> +			       const char **parent_names, struct clk_parent_data *parent_data,
>   			       u8 num_parents, u8 id,
>   			       const struct clk_programmable_layout *layout,
>   			       u32 *mux_table);
> diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c
> index 945983f72140..86d624cd92b2 100644
> --- a/drivers/clk/at91/sam9x7.c
> +++ b/drivers/clk/at91/sam9x7.c
> @@ -737,10 +737,11 @@ static const struct {
>   
>   static void __init sam9x7_pmc_setup(struct device_node *np)
>   {
> +	u8 td_slck_index = 0, md_slck_index = 1, main_xtal_index = 2;
>   	struct clk_range range = CLK_RANGE(0, 0);
>   	const char *main_xtal_name = "main_xtal";
> +	const char * const td_slck_name = "td_slck";
>   	const char *const md_slck_name = "md_slck";
> -	u8 md_slck_index = 1, main_xtal_index = 2;
>   	struct pmc_data *sam9x7_pmc;
>   	const char *parent_names[9];
>   	void **clk_mux_buffer = NULL;
> @@ -752,7 +753,7 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
>   	struct clk_hw *parent_hws[9];
>   	int i, j;
>   
> -	td_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "td_slck"));
> +	td_slck_hw = __clk_get_hw(of_clk_get_by_name(np, td_slck_name));

Please use a pattern like:

i = of_property_match_string(np, "clock-names", "td_slck");
if (i < 0)
    return;

td_slck_name = of_clk_get_parent_name(np, i);

Same sama7d65, sama7g5.


>   	md_slck_hw = __clk_get_hw(of_clk_get_by_name(np, md_slck_name));
>   	main_xtal_hw = __clk_get_hw(of_clk_get_by_name(np, main_xtal_name));
>   
> @@ -880,20 +881,20 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
>   	if (IS_ERR(usbck_hw))
>   		goto err_free;
>   
> -	parent_hws[0] = md_slck_hw;
> -	parent_hws[1] = td_slck_hw;
> -	parent_hws[2] = sam9x7_pmc->chws[PMC_MAIN];
> -	parent_hws[3] = sam9x7_pmc->chws[PMC_MCK];
> -	parent_hws[4] = sam9x7_plls[PLL_ID_PLLA][PLL_COMPID_DIV0].hw;
> -	parent_hws[5] = sam9x7_plls[PLL_ID_UPLL][PLL_COMPID_DIV0].hw;
> -	parent_hws[6] = sam9x7_plls[PLL_ID_AUDIO][PLL_COMPID_DIV0].hw;
> +	parent_data[0] = AT91_CLK_PD_NAME(md_slck_name, md_slck_index);

AT91_CLK_PD_NAME(md_slck_name);

> +	parent_data[1] = AT91_CLK_PD_NAME(td_slck_name, td_slck_index);

AT91_CLK_PD_NAME(td_slck_name);

Same sama7d65, sama7g5.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ