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Message-ID: <20250907182806.1031544-3-h-shenoy@ti.com>
Date: Sun, 7 Sep 2025 23:58:06 +0530
From: Harikrishna Shenoy <h-shenoy@...com>
To: <nm@...com>, <vigneshr@...com>, <kristo@...nel.org>, <robh@...nel.org>,
        <krzk+dt@...nel.org>, <conor+dt@...nel.org>, <r-ravikumar@...com>,
        <m-chawdhry@...com>, <b-padhi@...com>, <u-kumar1@...com>,
        <linux-arm-kernel@...ts.infradead.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <tomi.valkeinen@...asonboard.com>,
        <aradhya.bhatia@...ux.dev>, <devarsht@...com>, <s-jain1@...com>
Subject: [PATCH v2 2/2] arm64: dts: ti: k3-j784s4-j742s2-main-common: Update DSS EDP integration configuration register

Fix size of DSS_EDP0_INT_CFG_VP to 256B as stated in
TRM Table 2-1 MAIN Domain Memory Map.
Link:https://www.ti.com/lit/zip/spruj52/SPRUJ52-J84S4 AM69A TRM

Fixes: 9cc161a4509c ("arm64: dts: ti: Refactor J784s4 SoC files to a common file")
Signed-off-by: Harikrishna Shenoy <h-shenoy@...com>
---
 arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
index fbbe768e7a30..f0cda14c2530 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
@@ -2573,7 +2573,7 @@ port@1 {
 	mhdp: bridge@...0000 {
 		compatible = "ti,j721e-mhdp8546";
 		reg = <0x0 0xa000000 0x0 0x30a00>,
-		      <0x0 0x4f40000 0x0 0x20>;
+		      <0x0 0x4f40000 0x0 0x100>;
 		reg-names = "mhdptx", "j721e-intg";
 		clocks = <&k3_clks 217 11>;
 		interrupt-parent = <&gic500>;
-- 
2.34.1


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