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Message-ID: <1757237976-531416-1-git-send-email-tariqt@nvidia.com>
Date: Sun, 7 Sep 2025 12:39:34 +0300
From: Tariq Toukan <tariqt@...dia.com>
To: Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>, Andrew Lunn <andrew+netdev@...n.ch>, "David
S. Miller" <davem@...emloft.net>
CC: Saeed Mahameed <saeedm@...dia.com>, Leon Romanovsky <leon@...nel.org>,
Tariq Toukan <tariqt@...dia.com>, Mark Bloch <mbloch@...dia.com>, "Jonathan
Corbet" <corbet@....net>, Jiri Pirko <jiri@...nulli.us>,
<netdev@...r.kernel.org>, <linux-rdma@...r.kernel.org>,
<linux-doc@...r.kernel.org>, <linux-kernel@...r.kernel.org>, Gal Pressman
<gal@...dia.com>, Dragos Tatulea <dtatulea@...dia.com>
Subject: [PATCH net-next 0/2] net/mlx5e: Add pcie congestion event extras
Hi,
This small series by Dragos covers gaps requested in the initial pcie
congestion series [1]:
- Make pcie congestion thresholds configurable via devlink.
- Add a counter for stale pcie congestion events.
Regards,
Tariq
[1] https://lore.kernel.org/all/1752130292-22249-1-git-send-email-tariqt@nvidia.com/
Dragos Tatulea (2):
net/mlx5e: Make PCIe congestion event thresholds configurable
net/mlx5e: Add stale counter for PCIe congestion events
.../ethernet/mellanox/mlx5/counters.rst | 7 +-
Documentation/networking/devlink/mlx5.rst | 52 +++++++++
.../net/ethernet/mellanox/mlx5/core/devlink.c | 106 ++++++++++++++++++
.../net/ethernet/mellanox/mlx5/core/devlink.h | 4 +
.../mellanox/mlx5/core/en/pcie_cong_event.c | 79 +++++++++++--
5 files changed, 238 insertions(+), 10 deletions(-)
base-commit: c6142e1913de563ab772f7b0e4ae78d6de9cc5b1
--
2.31.1
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