linux-kernel - Re: [PATCH v3] iio: adc: ad7124: fix sample rate for multi-channel use

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Message-ID: <0505896b-02b5-465e-adc4-4404d8e657c1@baylibre.com>
Date: Mon, 8 Sep 2025 10:17:06 -0500
From: David Lechner <dlechner@...libre.com>
To: Jonathan Cameron <jic23@...nel.org>
Cc: Michael Hennerich <Michael.Hennerich@...log.com>,
 Nuno Sá <nuno.sa@...log.com>,
 Andy Shevchenko <andy@...nel.org>, linux-iio@...r.kernel.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3] iio: adc: ad7124: fix sample rate for multi-channel
 use

On 9/7/25 5:00 AM, Jonathan Cameron wrote:
> On Fri, 05 Sep 2025 12:33:34 -0500
> David Lechner <dlechner@...libre.com> wrote:
> 

...

> Given you replied to Andy's indentation comment on v2 and that seemed
> reasonable to me + the other change is a simplification for now I think
> this is ready to go.
> 
> Given the whole ABI / fixes tag point I'm going to apply it to the
> 'slow' path and taking via testing/togreg for the next merge windows.
> 
> Applied to togreg and pushed out as testing for 0-day to take a look.

With fresh eyes, I spotted a few minor mistakes...


>> diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c
>> index c6435327d431e5f4ba28aa3332ec6eb90da7c83d..70f458e3ccc12db884dda9003abcffdf48989e5e 100644
>> --- a/drivers/iio/adc/ad7124.c
>> +++ b/drivers/iio/adc/ad7124.c
>> @@ -93,10 +93,13 @@
>>  #define AD7124_CONFIG_PGA		GENMASK(2, 0)
>>  
>>  /* AD7124_FILTER_X */
>> -#define AD7124_FILTER_FS		GENMASK(10, 0)
>>  #define AD7124_FILTER_FILTER		GENMASK(23, 21)
>>  #define AD7124_FILTER_FILTER_SINC4		0
>>  #define AD7124_FILTER_FILTER_SINC3		2

>> +#define AD7124_FILTER_FILTER_SINC4_SINC1	4
>> +#define AD7124_FILTER_FILTER_SINC3_SINC1	5

Adding these two lines should be deferred to a later patch.

>> +#define AD7124_FILTER_SINGLE_CYCLE	BIT(16)
>> +#define AD7124_FILTER_FS		GENMASK(10, 0)
>>  
>>  #define AD7124_MAX_CONFIGS	8
>>  #define AD7124_MAX_CHANNELS	16
>> @@ -285,18 +288,20 @@ static u32 ad7124_get_fclk_hz(struct ad7124_state *st)
>>  
>>  static void ad7124_set_channel_odr(struct ad7124_state *st, unsigned int channel, unsigned int odr)
>>  {
>> -	unsigned int fclk, odr_sel_bits;
>> +	unsigned int fclk, factor, odr_sel_bits;
>>  
>>  	fclk = ad7124_get_fclk_hz(st);
>>  
>>  	/*
>> -	 * FS[10:0] = fCLK / (fADC x 32) where:
>> +	 * FS[10:0] = fCLK / (fADC x 32 * N) where:
>>  	 * fADC is the output data rate
>>  	 * fCLK is the master clock frequency
>> +	 * N is number of conversions per sample (depends of filter type)

typo: s/depends of/depends on/

>>  	 * FS[10:0] are the bits in the filter register
>>  	 * FS[10:0] can have a value from 1 to 2047
>>  	 */