[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <8cf65d78-2790-4467-a9b3-372af53c1374@oss.qualcomm.com>
Date: Mon, 8 Sep 2025 17:24:37 +0200
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Akhil P Oommen <akhilpo@....qualcomm.com>,
Rob Clark <robin.clark@....qualcomm.com>, Sean Paul <sean@...rly.run>,
Konrad Dybcio <konradybcio@...nel.org>,
Dmitry Baryshkov <lumag@...nel.org>,
Abhinav Kumar <abhinav.kumar@...ux.dev>,
Jessica Zhang <jessica.zhang@....qualcomm.com>,
Marijn Suijten <marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
Antonino Maniscalco <antomani103@...il.com>,
Neil Armstrong <neil.armstrong@...aro.org>
Cc: linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
freedreno@...ts.freedesktop.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 15/16] drm/msm/a6xx: Enable IFPC on Adreno X1-85
On 9/8/25 10:27 AM, Akhil P Oommen wrote:
> Add the IFPC restore register list and enable IFPC support on Adreno
> X1-85 gpu.
>
> Signed-off-by: Akhil P Oommen <akhilpo@....qualcomm.com>
> ---
[...]
> @@ -1432,12 +1495,14 @@ static const struct adreno_info a7xx_gpus[] = {
> .inactive_period = DRM_MSM_INACTIVE_PERIOD,
> .quirks = ADRENO_QUIRK_HAS_CACHED_COHERENT |
> ADRENO_QUIRK_HAS_HW_APRIV |
> - ADRENO_QUIRK_PREEMPTION,
> + ADRENO_QUIRK_PREEMPTION |
> + ADRENO_QUIRK_IFPC,
> .init = a6xx_gpu_init,
> .a6xx = &(const struct a6xx_info) {
> .hwcg = a740_hwcg,
> .protect = &a730_protect,
> .pwrup_reglist = &a7xx_pwrup_reglist,
> + .ifpc_reglist = &a750_ifpc_reglist,
> .gmu_chipid = 0x7050001,
> .gmu_cgc_mode = 0x00020202,
> },
> @@ -1466,6 +1531,7 @@ static const struct adreno_info a7xx_gpus[] = {
> .a6xx = &(const struct a6xx_info) {
> .protect = &a730_protect,
> .pwrup_reglist = &a7xx_pwrup_reglist,
> + .ifpc_reglist = &a750_ifpc_reglist,
The latter one should be part of the last patch
Konrad
Powered by blists - more mailing lists