linux-kernel - [PATCH 0/5] drm/msm/registers: gen

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Message-ID: <20250908193021.605012-1-robin.clark@oss.qualcomm.com>
Date: Mon,  8 Sep 2025 12:30:03 -0700
From: Rob Clark <robin.clark@....qualcomm.com>
To: dri-devel@...ts.freedesktop.org
Cc: freedreno@...ts.freedesktop.org, linux-arm-msm@...r.kernel.org,
        Rob Clark <robin.clark@....qualcomm.com>,
        Abhinav Kumar <abhinav.kumar@...ux.dev>,
        David Airlie <airlied@...il.com>, Dmitry Baryshkov <lumag@...nel.org>,
        Jessica Zhang <jessica.zhang@....qualcomm.com>,
        Konrad Dybcio <konradybcio@...nel.org>,
        linux-kernel@...r.kernel.org (open list),
        Marijn Suijten <marijn.suijten@...ainline.org>,
        Sean Paul <sean@...rly.run>, Simona Vetter <simona@...ll.ch>
Subject: [PATCH 0/5] drm/msm/registers: gen_header.py and regs sync

Now that https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37216
has synced kernel side changes back to mesa, this completes the round
trip by syncing mesa side changes back to the kernel.

Rob Clark (5):
  drm/msm/registers: Remove license/etc from generated headers
  drm/msm/registers: Sync gen_header.py from mesa
  drm/msm/registers: Make TPL1_BICUBIC_WEIGHTS_TABLE an array
  drm/msm/registers: Generate _HI/LO builders for reg64
  drm/msm/registers: Sync GPU registers from mesa

 drivers/gpu/drm/msm/adreno/a6xx_catalog.c     |  10 +-
 drivers/gpu/drm/msm/adreno/a6xx_gpu.c         |  18 +-
 drivers/gpu/drm/msm/adreno/a6xx_preempt.c     |   4 +-
 drivers/gpu/drm/msm/registers/adreno/a6xx.xml | 718 ++++++++++--------
 .../msm/registers/adreno/a6xx_descriptors.xml |  40 -
 .../drm/msm/registers/adreno/a6xx_enums.xml   |  50 +-
 .../drm/msm/registers/adreno/adreno_pm4.xml   | 179 ++---
 drivers/gpu/drm/msm/registers/gen_header.py   | 201 ++---
 8 files changed, 639 insertions(+), 581 deletions(-)

-- 
2.51.0