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Message-ID: <ffcc5d3f-bf3f-47a5-a034-a20c59f93ff1@ideasonboard.com>
Date: Mon, 8 Sep 2025 09:16:21 +0300
From: Tomi Valkeinen <tomi.valkeinen@...asonboard.com>
To: Harikrishna Shenoy <h-shenoy@...com>
Cc: nm@...com, vigneshr@...com, kristo@...nel.org, robh@...nel.org,
 krzk+dt@...nel.org, conor+dt@...nel.org, r-ravikumar@...com,
 m-chawdhry@...com, b-padhi@...com, u-kumar1@...com,
 linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, aradhya.bhatia@...ux.dev, devarsht@...com,
 s-jain1@...com
Subject: Re: [PATCH v2 1/2] arm64: dts: ti: k3-j721e-main: Update DSS EDP
 integration configuration register

Hi,

On 07/09/2025 21:28, Harikrishna Shenoy wrote:
> Fix size of DSS_EDP0_INT_CFG_VP to 256B as stated in
> TRM Table 2-1 MAIN Domain Memory Map.
> Link: https://www.ti.com/lit/zip/spruil1/SPRUIL_DRA829_TDA4VM

What issues does this cause?

 Tomi

> Fixes: 92c996f4ceab ("arm64: dts: ti: k3-j721e-*: add DP & DP PHY")
> Reviewed-by: Devarsh Thakkar <devarsht@...com>
> Signed-off-by: Harikrishna Shenoy <h-shenoy@...com>
> ---
>  arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> index ab3666ff4297..3fa7537d5414 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> @@ -1863,7 +1863,7 @@ mhdp: dp-bridge@...0000 {
>  		 * the PHY driver.
>  		 */
>  		reg = <0x00 0x0a000000 0x00 0x030a00>, /* DSS_EDP0_V2A_CORE_VP_REGS_APB */
> -		      <0x00 0x04f40000 0x00 0x20>;    /* DSS_EDP0_INTG_CFG_VP */
> +		      <0x00 0x04f40000 0x00 0x100>;    /* DSS_EDP0_INTG_CFG_VP */
>  		reg-names = "mhdptx", "j721e-intg";
>  
>  		clocks = <&k3_clks 151 36>;


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