linux-kernel - Re: [PATCH v2 21/23] dt-bindings: display: tegra: document Tegra20 and Tegra30 CSI

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Message-ID: <20250910021332.GA3634809-robh@kernel.org>
Date: Tue, 9 Sep 2025 21:13:32 -0500
From: Rob Herring <robh@...nel.org>
To: Svyatoslav Ryhel <clamor95@...il.com>
Cc: Thierry Reding <thierry.reding@...il.com>,
	Thierry Reding <treding@...dia.com>,
	Mikko Perttunen <mperttunen@...dia.com>,
	Jonathan Hunter <jonathanh@...dia.com>,
	Sowjanya Komatineni <skomatineni@...dia.com>,
	Luca Ceresoli <luca.ceresoli@...tlin.com>,
	David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
	Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
	Maxime Ripard <mripard@...nel.org>,
	Thomas Zimmermann <tzimmermann@...e.de>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Prashant Gaikwad <pgaikwad@...dia.com>,
	Michael Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...nel.org>,
	Mauro Carvalho Chehab <mchehab@...nel.org>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Dmitry Osipenko <digetx@...il.com>,
	Jonas Schwöbel <jonasschwoebel@...oo.de>,
	Charan Pedumuru <charan.pedumuru@...il.com>,
	dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
	linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-media@...r.kernel.org, linux-clk@...r.kernel.org,
	linux-staging@...ts.linux.dev
Subject: Re: [PATCH v2 21/23] dt-bindings: display: tegra: document Tegra20
 and Tegra30 CSI

On Tue, Sep 09, 2025 at 07:39:02PM +0300, Svyatoslav Ryhel wrote:
> вт, 9 вер. 2025 р. о 19:26 Rob Herring <robh@...nel.org> пише:
> >
> > On Sat, Sep 06, 2025 at 04:53:42PM +0300, Svyatoslav Ryhel wrote:
> > > Document CSI HW block found in Tegra20 and Tegra30 SoC.
> > >
> > > Signed-off-by: Svyatoslav Ryhel <clamor95@...il.com>
> > > ---
> > >  .../display/tegra/nvidia,tegra20-csi.yaml     | 104 ++++++++++++++++
> > >  .../display/tegra/nvidia,tegra30-csi.yaml     | 115 ++++++++++++++++++
> > >  2 files changed, 219 insertions(+)
> > >  create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-csi.yaml
> > >  create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra30-csi.yaml
> > >
> > > diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-csi.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-csi.yaml
> > > new file mode 100644
> > > index 000000000000..1a2858a5893c
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-csi.yaml
> > > @@ -0,0 +1,104 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-csi.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: NVIDIA Tegra20 CSI controller
> > > +
> > > +maintainers:
> > > +  - Svyatoslav Ryhel <clamor95@...il.com>
> > > +
> > > +properties:
> > > +  compatible:
> > > +    enum:
> > > +      - nvidia,tegra20-csi
> > > +
> > > +  reg:
> > > +    maxItems: 1
> > > +
> > > +  clocks:
> > > +    maxItems: 1
> > > +
> > > +  avdd-dsi-csi-supply:
> > > +    description: DSI/CSI power supply. Must supply 1.2 V.
> > > +
> > > +  power-domains:
> > > +    maxItems: 1
> > > +
> > > +  "#nvidia,mipi-calibrate-cells":
> > > +    description: The number of cells in a MIPI calibration specifier.
> > > +      Should be 1. The single cell specifies an id of the pads that
> > > +      need to be calibrated for a given device.
> > > +    $ref: /schemas/types.yaml#/definitions/uint32
> > > +    const: 1
> >
> > This property goes in the provider. Is the parent node the provider? You
> > don't really need any of it if it's all one block.
> >
> 
> Yes parent node is provides and channel is one of receivers, other one
> is DSI node.

Please make that clear in the descriptions somewhere.

> 
> > > +
> > > +  "#address-cells":
> > > +    const: 1
> > > +
> > > +  "#size-cells":
> > > +    const: 0
> > > +
> > > +patternProperties:
> > > +  "^channel@[0-1]$":
> > > +    type: object
> > > +    description: channel 0 represents CSI-A and 1 represents CSI-B
> > > +    additionalProperties: false
> > > +
> > > +    properties:
> > > +      reg:
> > > +        maxItems: 1
> >
> > Instead:
> >
> > maximum: 1
> >
> >
> > > +
> > > +      nvidia,mipi-calibrate:
> > > +        description: Should contain a phandle and a specifier specifying
> > > +          which pads are used by this DSI output and need to be
> > > +          calibrated. 0 is for CSI-A, 1 is for CSI-B, 2 is for DSI.
> > > +        $ref: /schemas/types.yaml#/definitions/phandle-array
> >
> > Is DSI applicable here?
> >
> 
> It is because CSI is calibration provider. I can move it up into
> #nvidia,mipi-calibrate-cells which may be more appropriate place.

Yes, as the provider defines the meaning of the cells (and they are 
opaque to the consumer).

Rob