linux-kernel - Re: [PATCH v4 21/34] Revert "arm64: dts: ti: k3-j721e-sk: Fix reversed C6x carveout locations"

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Message-ID: <4c9750c3-ba75-46ec-8398-0691d385d0d2@ti.com>
Date: Wed, 10 Sep 2025 09:07:31 -0500
From: Andrew Davis <afd@...com>
To: Beleswar Padhi <b-padhi@...com>, <nm@...com>, <vigneshr@...com>,
        <kristo@...nel.org>, <robh@...nel.org>, <krzk+dt@...nel.org>,
        <conor+dt@...nel.org>
CC: <u-kumar1@...com>, <hnagalla@...com>, <jm@...com>, <d-gole@...com>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v4 21/34] Revert "arm64: dts: ti: k3-j721e-sk: Fix
 reversed C6x carveout locations"

On 9/8/25 9:28 AM, Beleswar Padhi wrote:
> This reverts commit 9f3814a7c06b7c7296cf8c1622078ad71820454b.
> 
> The C6x carveouts are reversed intentionally. This is due to the
> requirement to keep the DMA memory region as non-cached, however the
> minimum granular cache region for C6x is 16MB. So, C66x_0 marks the
> entire C66x_1 16MB memory carveouts as non-cached, and uses the DMA
> memory region of C66x_1 as its own, and vice-versa.
> 
> This was also called out in the original commit which introduced these
> reversed carveouts:
> 	"The minimum granularity on the Cache settings on C66x DSP cores
> 	is 16MB, so the DMA memory regions are chosen such that they are
> 	in separate 16MB regions for each DSP, while reserving a total
> 	of 16 MB for each DSP and not changing the overall DSP
> 	remoteproc carveouts."
> 
> Fixes: 9f3814a7c06b ("arm64: dts: ti: k3-j721e-sk: Fix reversed C6x carveout locations")
> Signed-off-by: Beleswar Padhi <b-padhi@...com>
> ---

Still feels like something we should have fixed on the firmware side,
but since the firmware is out there already we can live with it.

Acked-by: Andrew Davis <afd@...com>

> v4: Changelog:
> 1. Updated carveout node names to generic 'memory@...r'
> 
> Link to v3:
> https://lore.kernel.org/all/20250905051846.1189612-21-b-padhi@ti.com/
> 
> v3: Changelog:
> 1. None
> 
> Link to v2:
> https://lore.kernel.org/all/20250823160901.2177841-21-b-padhi@ti.com/
> 
> v2: Changelog:
> 1. Re-ordered patch from [PATCH 03/33] to [PATCH v2 20/33].
> 
> Link to v1:
> https://lore.kernel.org/all/20250814223839.3256046-4-b-padhi@ti.com/
>   arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 6 ++++--
>   1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
> index 0f05e65f7bf7..37bc33f2cc26 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
> @@ -120,7 +120,8 @@ main_r5fss1_core1_memory_region: memory@...00000 {
>   			no-map;
>   		};
>   
> -		c66_0_dma_memory_region: memory@...00000 {
> +		/* Carveout locations are flipped due to caching */
> +		c66_1_dma_memory_region: memory@...00000 {
>   			compatible = "shared-dma-pool";
>   			reg = <0x00 0xa6000000 0x00 0x100000>;
>   			no-map;
> @@ -132,7 +133,8 @@ c66_0_memory_region: memory@...00000 {
>   			no-map;
>   		};
>   
> -		c66_1_dma_memory_region: memory@...00000 {
> +		/* Carveout locations are flipped due to caching */
> +		c66_0_dma_memory_region: memory@...00000 {
>   			compatible = "shared-dma-pool";
>   			reg = <0x00 0xa7000000 0x00 0x100000>;
>   			no-map;