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Message-ID: <20250910023608.GA3662482-robh@kernel.org>
Date: Tue, 9 Sep 2025 21:36:08 -0500
From: Rob Herring <robh@...nel.org>
To: Harikrishna Shenoy <h-shenoy@...com>
Cc: andrzej.hajda@...el.com, neil.armstrong@...aro.org, rfoss@...nel.org,
	Laurent.pinchart@...asonboard.com, jonas@...boo.se,
	jernej.skrabec@...il.com, airlied@...il.com, simona@...ll.ch,
	maarten.lankhorst@...ux.intel.com, mripard@...nel.org,
	tzimmermann@...e.de, krzk+dt@...nel.org, conor+dt@...nel.org,
	sjakhade@...ence.com, yamonkar@...ence.com,
	dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, devarsht@...com, u-kumar1@...com,
	s-jain1@...com
Subject: Re: [PATCH v4] dt-bindings: drm/bridge: MHDP8546 bridge binding
 changes for DSC

On Tue, Sep 09, 2025 at 11:16:22AM +0530, Harikrishna Shenoy wrote:
> From: Swapnil Jakhade <sjakhade@...ence.com>
> 
> Add binding changes for DSC(Display Stream Compression) in the MHDP8546
> DPI/DP bridge.
> 
> Signed-off-by: Swapnil Jakhade <sjakhade@...ence.com>
> Signed-off-by: Harikrishna Shenoy <h-shenoy@...com>
> ---
> Changelog v3 -> v4:
> -Remove maxItems as item list is mentioned for reg-names, resolves 
> dt_bindings_check warning.
> Log link- <https://gist.github.com/h-shenoy/5391ea514bb58a6cba3f39248d20916b>
> Link to v3- https://lore.kernel.org/all/20250908054609.1113360-1-h-shenoy@ti.com/
> 
>  .../bindings/display/bridge/cdns,mhdp8546.yaml | 18 ++++++++++++++----
>  1 file changed, 14 insertions(+), 4 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
> index c2b369456e4e..b40630de6d89 100644
> --- a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
> +++ b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
> @@ -27,6 +27,8 @@ properties:
>            Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs.
>        - description:
>            Register block of mhdptx sapb registers.
> +      - description:
> +          Register block for mhdptx DSC encoder registers.
>  
>    reg-names:
>      minItems: 1
> @@ -34,6 +36,7 @@ properties:
>        - const: mhdptx
>        - const: j721e-intg
>        - const: mhdptx-sapb
> +      - const: dsc
>  
>    clocks:
>      maxItems: 1
> @@ -100,18 +103,25 @@ allOf:
>        properties:
>          reg:
>            minItems: 2
> -          maxItems: 3
> +          maxItems: 4
>          reg-names:
>            minItems: 2
> -          maxItems: 3
> +          items:
> +            - const: mhdptx
> +            - const: j721e-intg
> +            - const: mhdptx-sapb
> +            - const: dsc
>      else:
>        properties:
>          reg:
>            minItems: 1
> -          maxItems: 2
> +          maxItems: 3
>          reg-names:
>            minItems: 1
> -          maxItems: 2
> +          items:
> +            - const: mhdptx
> +            - const: mhdptx-sapb
> +            - const: dsc

Still obviously not tested with a DT having this. Because this 
contradicts the top-level schema. Both cannot be true.

Rob

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