linux-kernel - Re: [PATCH] mtd: spi-nor: core: Check read CR support

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Message-ID: <87a532cqnr.fsf@bootlin.com>
Date: Wed, 10 Sep 2025 16:45:28 +0200
From: Miquel Raynal <miquel.raynal@...tlin.com>
To: "Jakub \"Kuba\" Czapiga" <czapiga@...gle.com>
Cc: Tudor Ambarus <tudor.ambarus@...aro.org>,  Pratyush Yadav
 <pratyush@...nel.org>,  Michael Walle <mwalle@...nel.org>,  Richard
 Weinberger <richard@....at>,  Vignesh Raghavendra <vigneshr@...com>,
  linux-mtd@...ts.infradead.org,  linux-kernel@...r.kernel.org,  Konrad
 Adamczyk <konrada@...gle.com>,  Adeel Arshad <adeel.arshad@...el.com>,
  Mika Westerberg <mika.westerberg@...ux.intel.com>
Subject: Re: [PATCH] mtd: spi-nor: core: Check read CR support

Hello,

On 10/09/2025 at 16:30:43 +02, "Jakub \"Kuba\" Czapiga" <czapiga@...gle.com> wrote:

> Hi Miquèl,
>
> On Wed, Sep 10, 2025 at 2:05 PM Miquel Raynal <miquel.raynal@...tlin.com> wrote:
>>
>> Hi Jakub,
>>
>> > diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
>> > index ac4b960101cc..79deee3a50d3 100644
>> > --- a/drivers/mtd/spi-nor/core.c
>> > +++ b/drivers/mtd/spi-nor/core.c
>> > @@ -2608,6 +2608,10 @@ static int spi_nor_setup(struct spi_nor *nor,
>> >               }
>> >       }
>> >
>> > +     /* Some SPI controllers might not support CR read opcode. */
>> > +     if (spi_nor_read_cr(nor, nor->bouncebuf) == -EOPNOTSUPP)
>>
>> There is a spi_nor_spimem_check_op() helper which might be better suited
>> for this purpose?
>
> spi_nor_spimem_check_op() works only for spi-mem devices. spi_nor_read_cr()
> handles both spi-mem and spi-nor controller. Using spi_nor_spimem_check_op()
> would require adding a variation of spi_nor_read_cr() that would use
> spi_nor_spimem_check_op() for spi-mem and spi_nor_controller_ops_read_reg()
> for spi-nor controller.
> Another way would be to do this check only for the spi-mem as spi-nor
> controllers seem to be deprecated in favour of spi-mem.

I'll let that choice to SPI NOR maintainers but we've collectively asked
to switch in favor of the spi memory API for quite some time, I would
not care too much about compatibility with the two remaining controllers
that have not yet been converted.

But here is a proper illustration why spi-mem rocks and why SPI NOR
controllers, besides making no sense (because we also have SPI NANDs
now) have a flacky API as of today's standards.

Thanks,
Miquèl