linux-kernel - Re: [PATCH v3 3/5] EDAC/amd64: Add support for AMD family 1Ah-based newer models

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Message-ID: <20250910151333.GF11602@yaz-khff2.amd.com>
Date: Wed, 10 Sep 2025 11:13:33 -0400
From: Yazen Ghannam <yazen.ghannam@....com>
To: Avadhut Naik <avadhut.naik@....com>
Cc: linux-edac@...r.kernel.org, bp@...en8.de, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 3/5] EDAC/amd64: Add support for AMD family 1Ah-based
 newer models

On Tue, Sep 09, 2025 at 06:53:12PM +0000, Avadhut Naik wrote:
> Add support for family 1Ah-based models 50h-57h, 90h-9Fh, A0h-AFh, and
> C0h-C7h.
> 
> Signed-off-by: Avadhut Naik <avadhut.naik@....com>
> ---
> Changes in v2:
> 1. Remove extra tabs
> 
> Changes in v3:
> 1. Since ctl_name string is now assigned at runtime, group similar models
> together.
> ---
>  drivers/edac/amd64_edac.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
> index 0fade110c3fb..804d3c4c3f14 100644
> --- a/drivers/edac/amd64_edac.c
> +++ b/drivers/edac/amd64_edac.c
> @@ -3895,6 +3895,16 @@ static int per_family_init(struct amd64_pvt *pvt)
>  		case 0x40 ... 0x4f:
>  			pvt->flags.zn_regs_v2   = 1;
>  			break;
> +		case 0x50 ... 0x57:
> +		case 0xc0 ... 0xc7:
> +			pvt->max_mcs            = 16;
> +			pvt->flags.zn_regs_v2   = 1;
> +			break;
> +		case 0x90 ... 0x9f:
> +		case 0xa0 ... 0xaf:
> +			pvt->max_mcs            = 8;
> +			pvt->flags.zn_regs_v2   = 1;

All of Family 1Ah uses 'zn_regs_v2', so this can go before the models
cases.

The register changes happened in Family 19h, so there are a mix of
models there.

We could be so bold to say 'zn_regs_v2 = (family >= 0x1A)' up top.

Family 19h would not set this, but then the individual model cases can
fix it up.

Thanks,
Yazen