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Message-ID: <20250910174911.GDaMG6FwK_mBD32hqe@fat_crate.local>
Date: Wed, 10 Sep 2025 19:49:11 +0200
From: Borislav Petkov <bp@...en8.de>
To: K Prateek Nayak <kprateek.nayak@....com>
Cc: Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>,
Dave Hansen <dave.hansen@...ux.intel.com>,
Sean Christopherson <seanjc@...gle.com>,
Paolo Bonzini <pbonzini@...hat.com>,
Jonathan Corbet <corbet@....net>, x86@...nel.org,
Naveen rao <naveen.rao@....com>, Sairaj Kodilkar <sarunkod@....com>,
"H. Peter Anvin" <hpa@...or.com>,
"Peter Zijlstra (Intel)" <peterz@...radead.org>,
"Xin Li (Intel)" <xin@...or.com>,
Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>,
linux-kernel@...r.kernel.org, kvm@...r.kernel.org,
Mario Limonciello <mario.limonciello@....com>,
"Gautham R. Shenoy" <gautham.shenoy@....com>,
Babu Moger <babu.moger@....com>,
Suravee Suthikulpanit <suravee.suthikulpanit@....com>
Subject: Re: [PATCH v5 3/4] x86/msr-index: Define AMD64_CPUID_FN_EXT MSR
On Mon, Sep 01, 2025 at 05:04:17PM +0000, K Prateek Nayak wrote:
> Explicitly define the AMD64_CPUID_FN_EXT MSR used to toggle the extended
> features. Also define and use the bits necessary for an old TOPOEXT
> fixup on AMD Family 0x15 processors.
>
> No functional changes intended.
>
> Signed-off-by: K Prateek Nayak <kprateek.nayak@....com>
> ---
> Changelog v4..v5:
>
> o No changes.
> ---
> arch/x86/include/asm/msr-index.h | 5 +++++
> arch/x86/kernel/cpu/topology_amd.c | 7 ++++---
> 2 files changed, 9 insertions(+), 3 deletions(-)
Did some massaging:
Author: K Prateek Nayak <kprateek.nayak@....com>
Date: Mon Sep 1 17:04:17 2025 +0000
x86/cpu/topology: Define AMD64_CPUID_EXT_FEAT MSR
Add defines for the 0xc001_1005 MSR (Core::X86::Msr::CPUID_ExtFeatures) used
to toggle the extended CPUID features, instead of using naked numbers. Also
define and use the bits necessary for an old TOPOEXT fixup on AMD Family 0x15
processors.
No functional changes intended.
[ bp: Massage, rename MSR to adhere to the documentation name. ]
Signed-off-by: K Prateek Nayak <kprateek.nayak@....com>
Signed-off-by: Borislav Petkov (AMD) <bp@...en8.de>
Link: https://lore.kernel.org/20250901170418.4314-1-kprateek.nayak@amd.com
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index a0c1dbf5692b..22ac1a62549b 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -633,6 +633,11 @@
#define MSR_AMD_PPIN 0xc00102f1
#define MSR_AMD64_CPUID_FN_7 0xc0011002
#define MSR_AMD64_CPUID_FN_1 0xc0011004
+
+#define MSR_AMD64_CPUID_EXT_FEAT 0xc0011005
+#define MSR_AMD64_CPUID_EXT_FEAT_TOPOEXT_BIT 54
+#define MSR_AMD64_CPUID_EXT_FEAT_TOPOEXT BIT_ULL(MSR_AMD64_CPUID_EXT_FEAT_TOPOEXT_BIT)
+
#define MSR_AMD64_LS_CFG 0xc0011020
#define MSR_AMD64_DC_CFG 0xc0011022
#define MSR_AMD64_TW_CFG 0xc0011023
diff --git a/arch/x86/kernel/cpu/topology_amd.c b/arch/x86/kernel/cpu/topology_amd.c
index 7ebd4a15c561..6ac097e13106 100644
--- a/arch/x86/kernel/cpu/topology_amd.c
+++ b/arch/x86/kernel/cpu/topology_amd.c
@@ -163,11 +163,12 @@ static void topoext_fixup(struct topo_scan *tscan)
c->x86 != 0x15 || c->x86_model < 0x10 || c->x86_model > 0x6f)
return;
- if (msr_set_bit(0xc0011005, 54) <= 0)
+ if (msr_set_bit(MSR_AMD64_CPUID_EXT_FEAT,
+ MSR_AMD64_CPUID_EXT_FEAT_TOPOEXT_BIT) <= 0)
return;
- rdmsrq(0xc0011005, msrval);
- if (msrval & BIT_64(54)) {
+ rdmsrq(MSR_AMD64_CPUID_EXT_FEAT, msrval);
+ if (msrval & MSR_AMD64_CPUID_EXT_FEAT_TOPOEXT) {
set_cpu_cap(c, X86_FEATURE_TOPOEXT);
pr_info_once(FW_INFO "CPU: Re-enabling disabled Topology Extensions Support.\n");
}
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
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