linux-kernel - Re: [PATCH net-next v2 0/9] Add PCS support for Renesas RZ/{T2H,N2H} SoCs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <CA+V-a8vo714BRZfpq+at+rU1zLizMN5GsAR+_rANTUsod8oDTw@mail.gmail.com>
Date: Wed, 10 Sep 2025 20:06:47 +0100
From: "Lad, Prabhakar" <prabhakar.csengg@...il.com>
To: Wolfram Sang <wsa+renesas@...g-engineering.com>
Cc: Clément Léger <clement.leger@...tlin.com>, 
	Andrew Lunn <andrew+netdev@...n.ch>, "David S. Miller" <davem@...emloft.net>, 
	Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, 
	Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Heiner Kallweit <hkallweit1@...il.com>, Russell King <linux@...linux.org.uk>, 
	Philipp Zabel <p.zabel@...gutronix.de>, Geert Uytterhoeven <geert+renesas@...der.be>, 
	Magnus Damm <magnus.damm@...il.com>, linux-renesas-soc@...r.kernel.org, 
	netdev@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org, Biju Das <biju.das.jz@...renesas.com>, 
	Fabrizio Castro <fabrizio.castro.jz@...esas.com>, 
	Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH net-next v2 0/9] Add PCS support for Renesas RZ/{T2H,N2H} SoCs

Hi Wolfram,

On Wed, Sep 10, 2025 at 11:18 AM Wolfram Sang
<wsa+renesas@...g-engineering.com> wrote:
>
> On Sat, Sep 06, 2025 at 02:19:37PM +0200, Wolfram Sang wrote:
> >
> > > This series aims to add PCS support for the Renesas RZ/T2H and RZ/N2H SoCs
> > > These SoCs include a MII converter (MIIC) that converts MII to RMII/RGMII
> > > or can be set in pass-through mode for MII similar to the RZ/N1 SoC. The
> > > MIIC is used in conjunction with the Ethernet switch (ETHSW) available on
> > > these SoCs.
> > >
> > > v1->v2:
> > > - Dropped regx in title and description in patch 1/9.
> > > - As done for other IPs used T2H compatible as a fallback for N2H.
> > > - Renamed pcs-rzt2h-miic.h -> renesas,r9a09g077-pcs-miic.h
> > > - Added matrix table in the new header file.
> > > - Corrected the resets check for RZ/N1.
> > > - Updated the commit message in patch 1/9.
> > > - Dropped regx in config description in patch 9/9.
> > > - Dropped patch "net: pcs: rzn1-miic: Add PCS validate callback
> > >   for RZ/T2H MIIC" is this already taken care in commit 508df2de7b3e
> > >   as pointed by Russell King.
> >
> > I plan to test this series on RZ/N1D next week, hopefully on Monday.
>
> No regressions found when using the 5 ethernet ports on the RZ/N1D
> board. For this series:
>
Thank you for testing this on RZ/N1, I'll send a v3 with some minor
comments fixed.

> Tested-by: Wolfram Sang <wsa+renesas@...g-engineering.com>
>

Cheers,
Prabhakar