linux-kernel - Re: [PATCH v8 5/6] drm: renesas: rz-du: mipi

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Message-ID: <5ddabd43-35a0-406e-bc4d-3878febd3341@ideasonboard.com>
Date: Wed, 10 Sep 2025 10:32:49 +0300
From: Tomi Valkeinen <tomi.valkeinen+renesas@...asonboard.com>
To: Prabhakar <prabhakar.csengg@...il.com>
Cc: dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-renesas-soc@...r.kernel.org,
 linux-clk@...r.kernel.org, Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
 Tommaso Merciai <tommaso.merciai.xr@...renesas.com>,
 Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
 Andrzej Hajda <andrzej.hajda@...el.com>,
 Neil Armstrong <neil.armstrong@...aro.org>, Robert Foss <rfoss@...nel.org>,
 Laurent Pinchart <Laurent.pinchart@...asonboard.com>,
 Jonas Karlman <jonas@...boo.se>, Jernej Skrabec <jernej.skrabec@...il.com>,
 Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
 Maxime Ripard <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>,
 David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>,
 Geert Uytterhoeven <geert+renesas@...der.be>,
 Michael Turquette <mturquette@...libre.com>, Stephen Boyd
 <sboyd@...nel.org>, Biju Das <biju.das.jz@...renesas.com>,
 Magnus Damm <magnus.damm@...il.com>
Subject: Re: [PATCH v8 5/6] drm: renesas: rz-du: mipi_dsi: Add LPCLK clock
 support

On 03/09/2025 19:17, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> 
> Add LPCLK clock handling to the RZ/G2L MIPI DSI driver to support proper
> DSI timing parameter configuration on RZ/V2H SoCs. While lpclk is present
> on both RZ/G2L and RZ/V2H SoCs, the RZ/V2H SoC specifically uses the lpclk
> rate to configure the DSI timing parameter ULPSEXIT.
> 
> Introduce a new lpclk field in the rzg2l_mipi_dsi structure and acquire
> the "lpclk" clock during probe to enable lpclk rate-based timing
> calculations on RZ/V2H while maintaining compatibility with RZ/G2L.
> 
> Co-developed-by: Fabrizio Castro <fabrizio.castro.jz@...esas.com>
> Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@...esas.com>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@...renesas.com>
> ---
> v7->v8:
> - Updated commit message
> - Switched to use devm_clk_get() instead of devm_clk_get_optional()
>   as lpclk clock is available on all SoCs.
> 
> v6->v7:
> - New patch
> Note, this patch was previously part of series [0].
> [0] https://lore.kernel.org/all/20250609225630.502888-1-prabhakar.mahadev-lad.rj@bp.renesas.com/
> ---
>  drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> index 3b52dfc0ea1e..bb03b49b1e85 100644
> --- a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> +++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> @@ -68,6 +68,7 @@ struct rzg2l_mipi_dsi {
>  	struct drm_bridge *next_bridge;
>  
>  	struct clk *vclk;
> +	struct clk *lpclk;
>  
>  	enum mipi_dsi_pixel_format format;
>  	unsigned int num_data_lanes;
> @@ -979,6 +980,10 @@ static int rzg2l_mipi_dsi_probe(struct platform_device *pdev)
>  	if (IS_ERR(dsi->vclk))
>  		return PTR_ERR(dsi->vclk);
>  
> +	dsi->lpclk = devm_clk_get(dsi->dev, "lpclk");
> +	if (IS_ERR(dsi->lpclk))
> +		return PTR_ERR(dsi->lpclk);
> +
>  	dsi->rstc = devm_reset_control_get_optional_exclusive(dsi->dev, "rst");
>  	if (IS_ERR(dsi->rstc))
>  		return dev_err_probe(dsi->dev, PTR_ERR(dsi->rstc),

Reviewed-by: Tomi Valkeinen <tomi.valkeinen+renesas@...asonboard.com>

 Tomi