linux-kernel - Re: [PATCH 15/33] arm_mpam: Probe MSCs to find the supported partid/pmg values

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Message-ID: <e8d05e0f-044f-485d-8630-1c4ec48b8032@arm.com>
Date: Wed, 10 Sep 2025 10:01:00 +0100
From: Ben Horgan <ben.horgan@....com>
To: James Morse <james.morse@....com>, linux-kernel@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-acpi@...r.kernel.org,
 devicetree@...r.kernel.org
Cc: shameerali.kolothum.thodi@...wei.com,
 D Scott Phillips OS <scott@...amperecomputing.com>,
 carl@...amperecomputing.com, lcherian@...vell.com,
 bobo.shaobowang@...wei.com, tan.shaopeng@...itsu.com,
 baolin.wang@...ux.alibaba.com, Jamie Iles <quic_jiles@...cinc.com>,
 Xin Hao <xhao@...ux.alibaba.com>, peternewman@...gle.com,
 dfustini@...libre.com, amitsinght@...vell.com,
 David Hildenbrand <david@...hat.com>, Rex Nie <rex.nie@...uarmicro.com>,
 Dave Martin <dave.martin@....com>, Koba Ko <kobak@...dia.com>,
 Shanker Donthineni <sdonthineni@...dia.com>, fenghuay@...dia.com,
 baisheng.gao@...soc.com, Jonathan Cameron <jonathan.cameron@...wei.com>,
 Rob Herring <robh@...nel.org>, Rohit Mathew <rohit.mathew@....com>,
 Rafael Wysocki <rafael@...nel.org>, Len Brown <lenb@...nel.org>,
 Lorenzo Pieralisi <lpieralisi@...nel.org>, Hanjun Guo
 <guohanjun@...wei.com>, Sudeep Holla <sudeep.holla@....com>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Catalin Marinas <catalin.marinas@....com>,
 Will Deacon <will@...nel.org>,
 Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
 Danilo Krummrich <dakr@...nel.org>
Subject: Re: [PATCH 15/33] arm_mpam: Probe MSCs to find the supported
 partid/pmg values

Hi James,

On 9/9/25 17:56, James Morse wrote:
> Hi Ben,
> 
> On 28/08/2025 14:12, Ben Horgan wrote:
>> On 8/22/25 16:29, James Morse wrote:
>>> CPUs can generate traffic with a range of PARTID and PMG values,
>>> but each MSC may have its own maximum size for these fields.
>>> Before MPAM can be used, the driver needs to probe each RIS on
>>> each MSC, to find the system-wide smallest value that can be used.
>>>
>>> While doing this, RIS entries that firmware didn't describe are create
>>> under MPAM_CLASS_UNKNOWN.
>>>
>>> While we're here, implement the mpam_register_requestor() call
>>> for the arch code to register the CPU limits. Future callers of this
>>> will tell us about the SMMU and ITS.
> 
>>> diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c
>>> index 9d6516f98acf..012e09e80300 100644
>>> --- a/drivers/resctrl/mpam_devices.c
>>> +++ b/drivers/resctrl/mpam_devices.c
>>> @@ -106,6 +116,74 @@ static inline u32 _mpam_read_partsel_reg(struct mpam_msc *msc, u16 reg)
> 
>>> +int mpam_register_requestor(u16 partid_max, u8 pmg_max)
>>> +{
>>> +	int err = 0;
>>> +
>>> +	lockdep_assert_irqs_enabled();
>>> +
>>> +	spin_lock(&partid_max_lock);
>>> +	if (!partid_max_init) {
>>> +		mpam_partid_max = partid_max;
>>> +		mpam_pmg_max = pmg_max;
>>> +		partid_max_init = true;
>>> +	} else if (!partid_max_published) {
>>> +		mpam_partid_max = min(mpam_partid_max, partid_max);
>>> +		mpam_pmg_max = min(mpam_pmg_max, pmg_max);
> 
>> Do we really need to reduce these maximum here? If, say, we add an SMMU
>> requester which supports fewer partids than the cpus don't we want to be
>> able to carry on using those partids from the cpus. In this case the
>> SMMU requestor can, without risk of error interrupts, just use all the
>> partids it supports.
> 
> How would it do that?
> 
> We're probably going to expose that SMMU, or the devices behind it, via resctrl. You can
> create 10 control groups in resctrl - but can't assign the SMMU/devices to the last two
> because it doesn't actually support that many...


Ok. If that's how it's going to be exposed to the user then it make sense.

> 
> 
> Thanks,
> 
> James

Thanks,

Ben