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Message-ID: <96b2a8c2-3619-4f9c-8760-aa396e63e472@suse.com>
Date: Wed, 10 Sep 2025 14:43:00 +0300
From: Nikolay Borisov <nik.borisov@...e.com>
To: Yazen Ghannam <yazen.ghannam@....com>, x86@...nel.org,
Tony Luck <tony.luck@...el.com>, "Rafael J. Wysocki" <rafael@...nel.org>
Cc: linux-kernel@...r.kernel.org, linux-edac@...r.kernel.org,
Smita.KoralahalliChannabasappa@....com, Qiuxu Zhuo <qiuxu.zhuo@...el.com>,
linux-acpi@...r.kernel.org
Subject: Re: [PATCH v6 01/15] x86/mce: Set CR4.MCE last during init
On 9/8/25 18:40, Yazen Ghannam wrote:
> Set the CR4.MCE bit as the last step during init. This brings the MCA
> init flow closer to what is described in the x86 docs.
>
> x86 docs:
> AMD Intel
> MCG_CTL
> MCA_CONFIG MCG_EXT_CTL
> MCi_CTL MCi_CTL
> MCG_CTL
> CR4.MCE CR4.MCE
>
> Current Linux:
> AMD Intel
> CR4.MCE CR4.MCE
> MCG_CTL MCG_CTL
> MCA_CONFIG MCG_EXT_CTL
> MCi_CTL MCi_CTL
>
> Updated Linux:
> AMD Intel
> MCG_CTL MCG_CTL
> MCA_CONFIG MCG_EXT_CTL
> MCi_CTL MCi_CTL
> CR4.MCE CR4.MCE
>
> The new init flow will match Intel's docs, but there will still be a
> mismatch for AMD regarding MCG_CTL. However, there is no known issue
> with this ordering, so leave it for now.
>
> Signed-off-by: Yazen Ghannam <yazen.ghannam@....com>
Reviewed-by: Nikolay Borisov <nik.borisov@...e.com>
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