[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <08fe01dc224a$cde7ff50$69b7fdf0$@samsung.com>
Date: Wed, 10 Sep 2025 17:32:25 +0530
From: "Raghav Sharma" <raghav.s@...sung.com>
To: "'Krzysztof Kozlowski'" <krzk@...nel.org>, <s.nawrocki@...sung.com>,
<cw00.choi@...sung.com>, <mturquette@...libre.com>, <sboyd@...nel.org>,
<robh@...nel.org>, <conor+dt@...nel.org>, <sunyeal.hong@...sung.com>,
<shin.son@...sung.com>, <alim.akhtar@...sung.com>
Cc: <linux-samsung-soc@...r.kernel.org>, <linux-clk@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <dev.tailor@...sung.com>,
<chandan.vn@...sung.com>, <karthik.sun@...sung.com>
Subject: RE: [PATCH v1 3/3] arm64: dts: exynosautov920: add CMU_M2M clock DT
nodes
Hi Krzysztof
> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@...nel.org>
> Sent: Monday, August 11, 2025 12:19 PM
> To: Raghav Sharma <raghav.s@...sung.com>; s.nawrocki@...sung.com;
> cw00.choi@...sung.com; mturquette@...libre.com; sboyd@...nel.org;
> robh@...nel.org; conor+dt@...nel.org; sunyeal.hong@...sung.com;
> shin.son@...sung.com; alim.akhtar@...sung.com
> Cc: linux-samsung-soc@...r.kernel.org; linux-clk@...r.kernel.org;
> devicetree@...r.kernel.org; linux-arm-kernel@...ts.infradead.org; linux-
> kernel@...r.kernel.org; dev.tailor@...sung.com; chandan.vn@...sung.com;
> karthik.sun@...sung.com
> Subject: Re: [PATCH v1 3/3] arm64: dts: exynosautov920: add CMU_M2M clock
> DT nodes
>
> On 08/08/2025 16:21, Raghav Sharma wrote:
> > Add required dt node for CMU_M2M block, which provides clocks for M2M
> > IP
> >
> > Signed-off-by: Raghav Sharma <raghav.s@...sung.com>
> > ---
> > arch/arm64/boot/dts/exynos/exynosautov920.dtsi | 13 +++++++++++++
> > 1 file changed, 13 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
> > b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
> > index 0fdf2062930a..086d6bbc18b8 100644
> > --- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
> > +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
> > @@ -1454,6 +1454,19 @@ pinctrl_aud: pinctrl@...60000 {
> > reg = <0x1a460000 0x10000>;
> > };
> >
> > + cmu_m2m: clock-controller@...a800000 {
>
>
> Are you sure this satisfies tests required by Samsung SoC maintainer profile?
>
Sorry for delay in reply, I was off for some time.
I understood the requirement here and thanks for your guidance on the other thread.
I shall post the new version post fixing the compilation warnings.
> Best regards,
> Krzysztof
Powered by blists - more mailing lists