linux-kernel - Re: [PATCH v2 4/7] clk: sunxi-ng: div: support power-of-two dividers

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Message-ID: <5919523.DvuYhMxLoT@jernej-laptop>
Date: Thu, 11 Sep 2025 20:08:56 +0200
From: Jernej Škrabec <jernej.skrabec@...il.com>
To: Stephen Boyd <sboyd@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
 Jernej Skrabec <jernej@...nel.org>, Samuel Holland <samuel@...lland.org>,
 Chen-Yu Tsai <wens@...nel.org>
Cc: Andre Przywara <andre.przywara@....com>, linux-sunxi@...ts.linux.dev,
 linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 4/7] clk: sunxi-ng: div: support power-of-two dividers

Dne četrtek, 11. september 2025 ob 19:47:07 Srednjeevropski poletni čas je Chen-Yu Tsai napisal(a):
> From: Chen-Yu Tsai <wens@...e.org>
> 
> Some clocks (for timers) on the A523 are mux-divider-gate types
> with the divider being values of power-of-two.
> 
> Add a macro for these types of clocks so that we can use the divider
> types instead of the M-P types without an M divider.
> 
> Signed-off-by: Chen-Yu Tsai <wens@...e.org>

Reviewed-by: Jernej Skrabec <jernej.skrabec@...il.com>

Best regards,
Jernej

> ---
>  drivers/clk/sunxi-ng/ccu_div.h | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
> 
> diff --git a/drivers/clk/sunxi-ng/ccu_div.h b/drivers/clk/sunxi-ng/ccu_div.h
> index 90d49ee8e0cc..be00b3277e97 100644
> --- a/drivers/clk/sunxi-ng/ccu_div.h
> +++ b/drivers/clk/sunxi-ng/ccu_div.h
> @@ -274,6 +274,24 @@ struct ccu_div {
>  	SUNXI_CCU_M_HWS_WITH_GATE(_struct, _name, _parent, _reg,	\
>  				  _mshift, _mwidth, 0, _flags)
>  
> +#define SUNXI_CCU_P_DATA_WITH_MUX_GATE(_struct, _name, _parents, _reg,	\
> +				       _mshift, _mwidth,		\
> +				       _muxshift, _muxwidth,		\
> +				       _gate, _flags)			\
> +	struct ccu_div _struct = {					\
> +		.enable	= _gate,					\
> +		.div	= _SUNXI_CCU_DIV_FLAGS(_mshift, _mwidth,	\
> +					       CLK_DIVIDER_POWER_OF_TWO), \
> +		.mux	= _SUNXI_CCU_MUX(_muxshift, _muxwidth),		\
> +		.common	= {						\
> +			.reg		= _reg,				\
> +			.hw.init	= CLK_HW_INIT_PARENTS_DATA(_name, \
> +								   _parents, \
> +								   &ccu_div_ops, \
> +								   _flags), \
> +		},							\
> +	}
> +
>  static inline struct ccu_div *hw_to_ccu_div(struct clk_hw *hw)
>  {
>  	struct ccu_common *common = hw_to_ccu_common(hw);
>