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Message-ID: <fff688c9-af7d-43fd-a3f1-00209842bcc9@oss.qualcomm.com>
Date: Thu, 11 Sep 2025 11:18:53 +0200
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Abel Vesa <abel.vesa@...aro.org>,
        Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
Cc: Vinod Koul <vkoul@...nel.org>, Kishon Vijay Abraham I
 <kishon@...nel.org>,
        Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
 <conor+dt@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Dmitry Baryshkov <lumag@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>,
        Neil Armstrong <neil.armstrong@...aro.org>,
        Johan Hovold <johan@...nel.org>, linux-arm-msm@...r.kernel.org,
        linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 3/3] phy: qcom: edp: Add Glymur platform support

On 9/11/25 10:52 AM, Abel Vesa wrote:
> On 25-09-09 14:12:46, Dmitry Baryshkov wrote:
>> On Tue, Sep 09, 2025 at 01:07:28PM +0300, Abel Vesa wrote:
>>> The Qualcomm Glymur platform has the new v8 version
>>> of the eDP/DP PHY. So rework the driver to support this
>>> new version and add the platform specific configuration data.
>>>
>>> Signed-off-by: Abel Vesa <abel.vesa@...aro.org>
>>> ---
>>>  drivers/phy/qualcomm/phy-qcom-edp.c | 242 ++++++++++++++++++++++++++++++++++--
>>>  1 file changed, 235 insertions(+), 7 deletions(-)
>>>
>>> diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy-qcom-edp.c
>>> index ca9bb9d70e29e1a132bd499fb9f74b5837acf45b..b670cda0fa066d3ff45c66b73cc67e165e55b79a 100644
>>> --- a/drivers/phy/qualcomm/phy-qcom-edp.c
>>> +++ b/drivers/phy/qualcomm/phy-qcom-edp.c
>>> @@ -26,13 +26,15 @@
>>>  #include "phy-qcom-qmp-qserdes-com-v4.h"
>>>  #include "phy-qcom-qmp-qserdes-com-v6.h"
>>>  
>>> +#include "phy-qcom-qmp-dp-qserdes-com-v8.h"
>>> +
>>>  /* EDP_PHY registers */
>>>  #define DP_PHY_CFG                              0x0010
>>>  #define DP_PHY_CFG_1                            0x0014
>>>  #define DP_PHY_PD_CTL                           0x001c
>>>  #define DP_PHY_MODE                             0x0020
>>>  
>>> -#define DP_AUX_CFG_SIZE                         10
>>> +#define DP_AUX_CFG_SIZE                         13
>>
>> If it differs from platform to platform, do we need to continue defining
>> it?
>>
>> Also, if the AUX CFG size has increased, didn't it cause other registers
>> to shift too?
> 
> AFAICT, all platforms have AUX_CFG0 through AUX_CFG12, we just didn't
> need to write anything to the last two so far.

I checked 7180/7280/8180/8280/x1e/Glymur and they all do

It would make sense to perhaps spell this out explicitly in a separate
patch

Konrad

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