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Message-ID: <87o6rfommn.fsf@BLaptop.bootlin.com>
Date: Fri, 12 Sep 2025 14:56:16 +0200
From: Gregory CLEMENT <gregory.clement@...tlin.com>
To: Josua Mayer <josua@...id-run.com>, Andrew Lunn <andrew@...n.ch>,
Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>, Rob Herring
<robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Frank Wunderlich <frank-w@...lic-files.de>
Cc: linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Josua Mayer <josua@...id-run.com>,
stable@...r.kernel.org
Subject: Re: [PATCH v2 1/4] arm64: dts: marvell: cn913x-solidrun: fix sata
ports status
Josua Mayer <josua@...id-run.com> writes:
> Commit "arm64: dts: marvell: only enable complete sata nodes" changed
> armada-cp11x.dtsi disabling all sata ports status by default.
>
> The author missed some dts which relied on the dtsi enabling all ports,
> and just disabled unused ones instead.
>
> Update dts for SolidRun cn913x based boards to enable the available
> ports, rather than disabling the unvavailable one.
>
> Further according to dt bindings the serdes phys are to be specified in
> the port node, not the controller node.
> Move those phys properties accordingly in clearfog base/pro/solidwan.
>
> Fixes: 30023876aef4 ("arm64: dts: marvell: only enable complete sata nodes")
> Cc: <stable@...r.kernel.org>
> Signed-off-by: Josua Mayer <josua@...id-run.com>
Applied on mvebu/fixes
Thanks,
Gregory
> ---
> arch/arm64/boot/dts/marvell/cn9130-cf.dtsi | 7 ++++---
> arch/arm64/boot/dts/marvell/cn9131-cf-solidwan.dts | 6 ++++--
> arch/arm64/boot/dts/marvell/cn9132-clearfog.dts | 6 ++----
> 3 files changed, 10 insertions(+), 9 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/marvell/cn9130-cf.dtsi b/arch/arm64/boot/dts/marvell/cn9130-cf.dtsi
> index ad0ab34b66028c53b8a18b3e8ee0c0aec869759f..bd42bfbe408bbe2a4d58dbd40204bcfb3c126312 100644
> --- a/arch/arm64/boot/dts/marvell/cn9130-cf.dtsi
> +++ b/arch/arm64/boot/dts/marvell/cn9130-cf.dtsi
> @@ -152,11 +152,12 @@ expander0_pins: cp0-expander0-pins {
>
> /* SRDS #0 - SATA on M.2 connector */
> &cp0_sata0 {
> - phys = <&cp0_comphy0 1>;
> status = "okay";
>
> - /* only port 1 is available */
> - /delete-node/ sata-port@0;
> + sata-port@1 {
> + phys = <&cp0_comphy0 1>;
> + status = "okay";
> + };
> };
>
> /* microSD */
> diff --git a/arch/arm64/boot/dts/marvell/cn9131-cf-solidwan.dts b/arch/arm64/boot/dts/marvell/cn9131-cf-solidwan.dts
> index 47234d0858dd2195bb1485f25768ad3c757b7ac2..338853d3b179bb5cb742e975bb830fdb9d62d4cc 100644
> --- a/arch/arm64/boot/dts/marvell/cn9131-cf-solidwan.dts
> +++ b/arch/arm64/boot/dts/marvell/cn9131-cf-solidwan.dts
> @@ -563,11 +563,13 @@ &cp1_rtc {
>
> /* SRDS #1 - SATA on M.2 (J44) */
> &cp1_sata0 {
> - phys = <&cp1_comphy1 0>;
> status = "okay";
>
> /* only port 0 is available */
> - /delete-node/ sata-port@1;
> + sata-port@0 {
> + phys = <&cp1_comphy1 0>;
> + status = "okay";
> + };
> };
>
> &cp1_syscon0 {
> diff --git a/arch/arm64/boot/dts/marvell/cn9132-clearfog.dts b/arch/arm64/boot/dts/marvell/cn9132-clearfog.dts
> index 0f53745a6fa0d8cbd3ab9cdc28a972ed748c275f..115c55d73786e2b9265e1caa4c62ee26f498fb41 100644
> --- a/arch/arm64/boot/dts/marvell/cn9132-clearfog.dts
> +++ b/arch/arm64/boot/dts/marvell/cn9132-clearfog.dts
> @@ -512,10 +512,9 @@ &cp1_sata0 {
> status = "okay";
>
> /* only port 1 is available */
> - /delete-node/ sata-port@0;
> -
> sata-port@1 {
> phys = <&cp1_comphy3 1>;
> + status = "okay";
> };
> };
>
> @@ -631,9 +630,8 @@ &cp2_sata0 {
> status = "okay";
>
> /* only port 1 is available */
> - /delete-node/ sata-port@0;
> -
> sata-port@1 {
> + status = "okay";
> phys = <&cp2_comphy3 1>;
> };
> };
>
> --
> 2.51.0
>
>
--
Grégory CLEMENT, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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