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Message-ID: <BL1PR11MB527130DBD1D596894EF709BE8C08A@BL1PR11MB5271.namprd11.prod.outlook.com>
Date: Fri, 12 Sep 2025 08:19:57 +0000
From: "Tian, Kevin" <kevin.tian@...el.com>
To: Lu Baolu <baolu.lu@...ux.intel.com>, Joerg Roedel <joro@...tes.org>, "Will
 Deacon" <will@...nel.org>, Robin Murphy <robin.murphy@....com>, "Jason
 Gunthorpe" <jgg@...dia.com>, Jann Horn <jannh@...gle.com>, Vasant Hegde
	<vasant.hegde@....com>, "Hansen, Dave" <dave.hansen@...el.com>, "Alistair
 Popple" <apopple@...dia.com>, Peter Zijlstra <peterz@...radead.org>,
	Uladzislau Rezki <urezki@...il.com>, Jean-Philippe Brucker
	<jean-philippe@...aro.org>, Andy Lutomirski <luto@...nel.org>, "Lai, Yi1"
	<yi1.lai@...el.com>
CC: "iommu@...ts.linux.dev" <iommu@...ts.linux.dev>, "security@...nel.org"
	<security@...nel.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>, Dave Hansen <dave.hansen@...ux.intel.com>
Subject: RE: [PATCH v4 7/8] mm: Hook up Kconfig options for async page table
 freeing

> From: Lu Baolu <baolu.lu@...ux.intel.com>
> Sent: Friday, September 5, 2025 1:51 PM
> 
> From: Dave Hansen <dave.hansen@...ux.intel.com>
> 
> The CONFIG_ASYNC_PGTABLE_FREE option controls whether an architecture
> requires asynchronous page table freeing. On x86, this is selected if
> IOMMU_SVA is enabled, because both Intel and AMD IOMMU architectures
> could potentially cache kernel page table entries in their paging
> structure cache, regardless of the permission.
> 
> Signed-off-by: Dave Hansen <dave.hansen@...ux.intel.com>
> Signed-off-by: Lu Baolu <baolu.lu@...ux.intel.com>
> ---
>  arch/x86/Kconfig | 1 +
>  mm/Kconfig       | 3 +++
>  2 files changed, 4 insertions(+)
> 
> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
> index 58d890fe2100..1b2326d81681 100644
> --- a/arch/x86/Kconfig
> +++ b/arch/x86/Kconfig
> @@ -281,6 +281,7 @@ config X86
>  	select HAVE_PCI
>  	select HAVE_PERF_REGS
>  	select HAVE_PERF_USER_STACK_DUMP
> +	select ASYNC_PGTABLE_FREE		if IOMMU_SVA
>  	select MMU_GATHER_RCU_TABLE_FREE
>  	select MMU_GATHER_MERGE_VMAS
>  	select HAVE_POSIX_CPU_TIMERS_TASK_WORK
> diff --git a/mm/Kconfig b/mm/Kconfig
> index e443fe8cd6cf..1576409cec03 100644
> --- a/mm/Kconfig
> +++ b/mm/Kconfig
> @@ -920,6 +920,9 @@ config PAGE_MAPCOUNT
>  config PGTABLE_HAS_HUGE_LEAVES
>  	def_bool TRANSPARENT_HUGEPAGE || HUGETLB_PAGE
> 
> +config ASYNC_PGTABLE_FREE
> +	def_bool n
> +

be more accurate as ASYNC_KERN_PGTABLE_FREE? not a strong
opinion but doing so avoids giving one the impression that it's
a generic async mechanism for all pgtable pages.

Reviewed-by: Kevin Tian <kevin.tian@...el.com>

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