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Message-ID: <20250912093534.GF12516@e132581.arm.com>
Date: Fri, 12 Sep 2025 10:35:34 +0100
From: Leo Yan <leo.yan@....com>
To: Sean Anderson <sean.anderson@...ux.dev>
Cc: Suzuki K Poulose <suzuki.poulose@....com>, coresight@...ts.linaro.org,
linux-arm-kernel@...ts.infradead.org,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Mike Leach <mike.leach@...aro.org>,
Linu Cherian <lcherian@...vell.com>,
James Clark <james.clark@...aro.org>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] coresight: Fix possible deadlock in coresight_panic_cb
Hi Sean,
On Thu, Sep 11, 2025 at 11:33:15AM -0400, Sean Anderson wrote:
> coresight_panic_cb is called with interrupts disabled during panics.
> However, bus_for_each_dev calls bus_to_subsys which takes
> bus_kset->list_lock without disabling IRQs. This will cause a deadlock
> if a panic occurs while one of the other coresight functions that uses
> bus_for_each_dev is running.
The decription is a bit misleading. Even when IRQ is disabled, if an
exception happens, a CPU still can be trapped for handling kernel panic.
> Maintain a separate list of coresight devices to access during a panic.
Rather than maintaining a separate list and introducing a new spinlock,
I would argue if we can simply register panic notifier in TMC ETR and
ETF drviers (see tmc_panic_sync_etr() and tmc_panic_sync_etf()).
If there is no dependency between CoreSight modules in panic sync flow,
it is not necessary to maintain list (and lock) for these modules.
I have not involved in panic patches before, so I would like to know
the maintainers' opinion.
Thanks,
Leo
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