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Message-ID: <20250912122444.3870284-5-claudiu.beznea.uj@bp.renesas.com>
Date: Fri, 12 Sep 2025 15:24:42 +0300
From: Claudiu <claudiu.beznea@...on.dev>
To: bhelgaas@...gle.com,
lpieralisi@...nel.org,
kwilczynski@...nel.org,
mani@...nel.org,
robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
geert+renesas@...der.be,
magnus.damm@...il.com,
p.zabel@...gutronix.de
Cc: claudiu.beznea@...on.dev,
linux-pci@...r.kernel.org,
linux-renesas-soc@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Claudiu Beznea <claudiu.beznea.uj@...renesas.com>,
Wolfram Sang <wsa+renesas@...g-engineering.com>
Subject: [PATCH v4 4/6] arm64: dts: renesas: rzg3s-smarc-som: Update dma-ranges for PCIe
From: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
The first 128MB of memory is reserved on this board for secure area.
Secure area is a RAM region used by firmware. The rzg3s-smarc-som.dtsi
memory node (memory@...00000) excludes the secure area.
Update the PCIe dma-ranges property to reflect this.
Tested-by: Wolfram Sang <wsa+renesas@...g-engineering.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
---
Changes in v4:
- updated the patch description with secure area meaning
- added reference clock for pcie_port0
Changes in v3:
- collected tags
Changes in v2:
- none, this patch is new
arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi
index 39845faec894..4c1bb97ac9ed 100644
--- a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi
@@ -214,6 +214,16 @@ &sdhi2 {
};
#endif
+&pcie {
+ /* First 128MB is reserved for secure area. */
+ dma-ranges = <0x42000000 0 0x48000000 0 0x48000000 0x0 0x38000000>;
+};
+
+&pcie_port0 {
+ clocks = <&versa3 5>;
+ clock-names = "ref";
+};
+
&pinctrl {
#if SW_CONFIG3 == SW_ON
eth0-phy-irq-hog {
--
2.43.0
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