linux-kernel - [PATCH 3/7] dt-bindings: riscv: cpus: Add SiFive X280 compatible

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Message-Id: <20250913-tt-bh-dts-v1-3-ddb0d6860fe5@tenstorrent.com>
Date: Sat, 13 Sep 2025 14:31:02 -0700
From: Drew Fustini <fustini@...nel.org>
To: Paul Walmsley <paul.walmsley@...ive.com>, 
 Palmer Dabbelt <palmer@...belt.com>, Alexandre Ghiti <alex@...ti.fr>, 
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, 
 Samuel Holland <samuel.holland@...ive.com>, 
 Daniel Lezcano <daniel.lezcano@...aro.org>, 
 Thomas Gleixner <tglx@...utronix.de>, Anup Patel <anup@...infault.org>, 
 Arnd Bergmann <arnd@...db.de>, Joel Stanley <jms@...storrent.com>, 
 Joel Stanley <joel@....id.au>, Michael Neuling <mikey@...ling.org>, 
 Nicholas Piggin <npiggin@...il.com>, Michael Ellerman <mpe@...nel.org>, 
 Andy Gross <agross@...nel.org>
Cc: linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org, 
 devicetree@...r.kernel.org, Conor Dooley <conor@...nel.org>, 
 Drew Fustini <dfustini@...storrent.com>
Subject: [PATCH 3/7] dt-bindings: riscv: cpus: Add SiFive X280 compatible

From: Drew Fustini <dfustini@...storrent.com>

Document compatible for the SiFive X280 RISC-V core.

Signed-off-by: Drew Fustini <dfustini@...storrent.com>
---
 Documentation/devicetree/bindings/riscv/cpus.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
index 1a0cf0702a45d2df38c48f50d66b3d2ac3715da5..bbc3886282dc5e8c53e54c0acd91608b443f590f 100644
--- a/Documentation/devicetree/bindings/riscv/cpus.yaml
+++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
@@ -69,6 +69,7 @@ properties:
           - enum:
               - sifive,e51
               - sifive,u54-mc
+              - sifive,x280
           - const: sifive,rocket0
           - const: riscv
       - const: riscv    # Simulator only

-- 
2.34.1