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Message-Id: <20250915-msm8916-resets-v1-3-a5c705df0c45@linaro.org>
Date: Mon, 15 Sep 2025 15:28:32 +0200
From: Stephan Gerhold <stephan.gerhold@...aro.org>
To: Bjorn Andersson <andersson@...nel.org>, 
 Konrad Dybcio <konradybcio@...nel.org>
Cc: Vincent Knecht <vincent.knecht@...loo.org>, 
 Bryan O'Donoghue <bryan.odonoghue@...aro.org>, 
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, linux-arm-msm@...r.kernel.org, 
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH 3/3] arm64: dts: qcom: msm8916: Add SDCC resets

Add the missing resets for the two SDCC controllers to allow fully
resetting previous hardware state from the bootloader.

Signed-off-by: Stephan Gerhold <stephan.gerhold@...aro.org>
---
Unlike the previous two commits with the MDSS resets, this is more
"cleanup" than "fix", so I omitted the Fixes tag and Cc stable here.
There are no reported issues with the reset omitted.
---
 arch/arm64/boot/dts/qcom/msm8916.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index de0c10b54c86c7795b7a0d1ecd80652e60e117b6..d3a25a837488c940f7f9dd08d0aa4054aeed014c 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -2127,6 +2127,7 @@ sdhc_1: mmc@...4900 {
 				 <&gcc GCC_SDCC1_APPS_CLK>,
 				 <&xo_board>;
 			clock-names = "iface", "core", "xo";
+			resets = <&gcc GCC_SDCC1_BCR>;
 			pinctrl-0 = <&sdc1_default>;
 			pinctrl-1 = <&sdc1_sleep>;
 			pinctrl-names = "default", "sleep";
@@ -2148,6 +2149,7 @@ sdhc_2: mmc@...4900 {
 				 <&gcc GCC_SDCC2_APPS_CLK>,
 				 <&xo_board>;
 			clock-names = "iface", "core", "xo";
+			resets = <&gcc GCC_SDCC2_BCR>;
 			pinctrl-0 = <&sdc2_default>;
 			pinctrl-1 = <&sdc2_sleep>;
 			pinctrl-names = "default", "sleep";

-- 
2.50.1


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