[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <1c16121a-36a6-4101-9a2c-d45547c6ea0a@kernel.org>
Date: Mon, 15 Sep 2025 09:13:44 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: "myunggeun.ji" <myunggeun.ji@...sung.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Alim Akhtar <alim.akhtar@...sung.com>,
Marek Szyprowski <m.szyprowski@...sung.com>, Joerg Roedel <joro@...tes.org>,
Will Deacon <will@...nel.org>, Robin Murphy <robin.murphy@....com>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org,
iommu@...ts.linux.dev
Cc: Jongho Park <jongho0910.park@...sung.com>,
kiisung lee <kiisung.lee@...sung.com>
Subject: Re: [PATCH 1/2] iommu/exynos: Implement register set and fault
handling on SysMMU v9
On 15/09/2025 07:13, myunggeun.ji wrote:
> +
> static struct exynos_iommu_domain *to_exynos_domain(struct iommu_domain *dom)
> {
> return container_of(dom, struct exynos_iommu_domain, domain);
> @@ -522,19 +571,26 @@ static void __sysmmu_get_version(struct sysmmu_drvdata *data)
> ver = readl(data->sfrbase + REG_MMU_VERSION);
>
> /* controllers on some SoCs don't report proper version */
> +
Please clean up your patch before posting.
> if (ver == 0x80000001u)
> data->version = MAKE_MMU_VER(1, 0);
> else
> data->version = MMU_RAW_VER(ver);
>
> - dev_dbg(data->sysmmu, "hardware version: %d.%d\n",
> - MMU_MAJ_VER(data->version), MMU_MIN_VER(data->version));
> + if (data->version != 0x91)
> + dev_err(data->sysmmu, "hardware version: %d.%d\n",
> + MMU_MAJ_VER(data->version), MMU_MIN_VER(data->version));
> + else if (data->version == 0x91)
> + dev_err(data->sysmmu, "hardware version: %d.%d\n",
> + MMU_MAJ_VER_V9(data->version), MMU_MIN_VER_V9(data->version));
>
> - if (MMU_MAJ_VER(data->version) < 5) {
> + if (data->version == 0x91) {
> + data->variant = &sysmmu_v9_vm_variant;
> + } else if (MMU_MAJ_VER(data->version) < 5) {
> data->variant = &sysmmu_v1_variant;
> } else if (MMU_MAJ_VER(data->version) < 7) {
> data->variant = &sysmmu_v5_variant;
> - } else {
> + } else if (MMU_MAJ_VER(data->version) < 9) {
> if (__sysmmu_has_capa1(data))
> __sysmmu_get_vcr(data);
> if (data->has_vcr)
> @@ -763,10 +819,9 @@ static int exynos_sysmmu_probe(struct platform_device *pdev)
> if (IS_ERR(data->pclk))
> return PTR_ERR(data->pclk);
>
> - if (!data->clk && (!data->aclk || !data->pclk)) {
> - dev_err(dev, "Failed to get device clock(s)!\n");
> - return -ENOSYS;
> - }
> + /* There is no clock information after v9 */
There is, you just missed to implement it.
> + if (!data->clk && (!data->aclk || !data->pclk))
> + dev_warn(dev, "Failed to get device clock(s)!\n");
>
Best regards,
Krzysztof
Powered by blists - more mailing lists