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Message-ID: <7bacf8ca-4ec4-4b06-b989-52e287a812d8@collabora.com>
Date: Mon, 15 Sep 2025 09:28:56 +0200
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: Igor Belwon <igor.belwon@...tallysanemainliners.org>,
Linus Walleij <linus.walleij@...aro.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Matthias Brugger <matthias.bgg@...il.com>,
Sean Wang <sean.wang@...nel.org>
Cc: linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH v2 1/4] dt-bindings: pinctrl: mediatek: Document MT6878
pin controller bindings
Il 14/09/25 16:51, Igor Belwon ha scritto:
> Add device-tree bindings for the pin controller and the EINT controller
> found in the MediaTek MT6878 SoC.
>
> Signed-off-by: Igor Belwon <igor.belwon@...tallysanemainliners.org>
> ---
> .../bindings/pinctrl/mediatek,mt6878-pinctrl.yaml | 210 +++++++++++++++++++++
> 1 file changed, 210 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6878-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6878-pinctrl.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..f320d286ad2155bc4aa449c195ddff3a8686204c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6878-pinctrl.yaml
> @@ -0,0 +1,210 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pinctrl/mediatek,mt6878-pinctrl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek MT6878 Pin Controller
> +
> +maintainers:
> + - AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
> + - Igor Belwon <igor.belwon@...tallysanemainliners.org>
> +
> +description:
> + The MediaTek MT6878 Pin controller is used to control SoC pins.
> +
> +properties:
> + compatible:
> + const: mediatek,mt6878-pinctrl
> +
> + reg:
> + items:
> + - description: pin controller base
> + - description: bl group IO
> + - description: bm group IO
> + - description: br group IO
> + - description: bl1 group IO
> + - description: br1 group IO
> + - description: lm group IO
> + - description: lt group IO
> + - description: rm group IO
> + - description: rt group IO
> + - description: EINT controller E block
> + - description: EINT controller S block
> + - description: EINT controller W block
> + - description: EINT controller C block
> +
> + reg-names:
> + items:
> + - const: base
> + - const: bl
> + - const: bm
> + - const: br
> + - const: bl1
> + - const: br1
> + - const: lm
> + - const: lt
> + - const: rm
> + - const: rt
> + - const: eint-e
> + - const: eint-s
> + - const: eint-w
> + - const: eint-c
> +
> + gpio-controller: true
> +
> + '#gpio-cells':
> + description:
> + Number of cells in GPIO specifier. Since the generic GPIO binding is used,
> + the amount of cells must be specified as 2. See the below mentioned gpio
> + binding representation for description of particular cells.
> + const: 2
> +
> + gpio-ranges:
> + maxItems: 1
> +
> + gpio-line-names: true
Krzysztof asked you to restrict the maximum number of gpio-line-names if I
remember correctly, you forgot to do so :-)
Cheers,
Angelo
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